sched/doc: Update documentation for base_slice_ns and CONFIG_HZ relation
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / iio / adc / nxp,imx93-adc.yaml
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NXP iMX93 ADC
8
9 maintainers:
10   - Haibo Chen <haibo.chen@nxp.com>
11
12 description:
13   The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
14   connected to pins. it support normal and inject mode, include
15   One-Shot and Scan (continuous) conversions. Programmable DMA
16   enables for each channel  Also this ADC contain alternate analog
17   watchdog thresholds, select threshold through input ports. And
18   also has Self-test logic and Software-initiated calibration.
19
20 properties:
21   compatible:
22     const: nxp,imx93-adc
23
24   reg:
25     maxItems: 1
26
27   interrupts:
28     items:
29       - description: WDGnL, watchdog threshold interrupt requests.
30       - description: WDGnH, watchdog threshold interrupt requests.
31       - description: normal conversion, include EOC (End of Conversion),
32           ECH (End of Chain), JEOC (End of Injected Conversion) and
33           JECH (End of injected Chain).
34       - description: Self-testing Interrupts.
35
36   clocks:
37     maxItems: 1
38
39   clock-names:
40     const: ipg
41
42   vref-supply:
43     description:
44       The reference voltage which used to establish channel scaling.
45
46   "#io-channel-cells":
47     const: 1
48
49 required:
50   - compatible
51   - reg
52   - interrupts
53   - clocks
54   - clock-names
55   - vref-supply
56   - "#io-channel-cells"
57
58 additionalProperties: false
59
60 examples:
61   - |
62     #include <dt-bindings/interrupt-controller/irq.h>
63     #include <dt-bindings/clock/imx93-clock.h>
64     #include <dt-bindings/interrupt-controller/arm-gic.h>
65     soc {
66         #address-cells = <1>;
67         #size-cells = <1>;
68         adc@44530000 {
69             compatible = "nxp,imx93-adc";
70             reg = <0x44530000 0x10000>;
71             interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
72                          <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
73                          <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
74                          <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
75             clocks = <&clk IMX93_CLK_ADC1_GATE>;
76             clock-names = "ipg";
77             vref-supply = <&reg_vref_1v8>;
78             #io-channel-cells = <1>;
79         };
80     };
81 ...