1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB, MSM8998)
10 - Vinod Koul <vkoul@kernel.org>
13 The QMP PHY controller supports physical layer functionality for USB-C on
14 several Qualcomm chipsets.
19 - qcom,msm8998-qmp-usb3-phy
20 - qcom,qcm2290-qmp-usb3-phy
21 - qcom,sdm660-qmp-usb3-phy
22 - qcom,sm6115-qmp-usb3-phy
56 Flag the PHY as possible handler of USB Type-C orientation switching
60 $ref: /schemas/types.yaml#/definitions/phandle-array
63 - description: phandle to TCSR hardware block
64 - description: offset of the VLS CLAMP register
65 description: Clamp register present in the TCSR
68 $ref: /schemas/graph.yaml#/properties/ports
71 $ref: /schemas/graph.yaml#/properties/port
72 description: Output endpoint of the PHY
75 $ref: /schemas/graph.yaml#/properties/port
76 description: Incoming endpoint from the USB controller
98 - qcom,msm8998-qmp-usb3-phy
99 - qcom,sdm660-qmp-usb3-phy
116 - qcom,qcm2290-qmp-usb3-phy
117 - qcom,sm6115-qmp-usb3-phy
129 additionalProperties: false
133 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
134 #include <dt-bindings/clock/qcom,rpmh.h>
137 compatible = "qcom,msm8998-qmp-usb3-phy";
138 reg = <0x0c010000 0x1000>;
140 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
141 <&gcc GCC_USB3_CLKREF_CLK>,
142 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
143 <&gcc GCC_USB3_PHY_PIPE_CLK>;
148 clock-output-names = "usb3_phy_pipe_clk_src";
152 resets = <&gcc GCC_USB3_PHY_BCR>,
153 <&gcc GCC_USB3PHY_PHY_BCR>;
157 vdda-phy-supply = <&vreg_l1a_0p875>;
158 vdda-pll-supply = <&vreg_l2a_1p2>;
162 qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>;
165 #address-cells = <1>;
172 remote-endpoint = <&pmic_typec_mux_in>;
180 remote-endpoint = <&usb_dwc3_ss>;