Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SC7280 WPSS Peripheral Image Loader
   8
   9 maintainers:
  10   - Bjorn Andersson <bjorn.andersson@linaro.org>
  11
  12 description:
  13   This document defines the binding for a component that loads and boots firmware
  14   on the Qualcomm Technology Inc. WPSS.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - qcom,sc7280-wpss-pil
  20
  21   reg:
  22     maxItems: 1
  23     description:
  24       The base address and size of the qdsp6ss register
  25
  26   interrupts:
  27     items:
  28       - description: Watchdog interrupt
  29       - description: Fatal interrupt
  30       - description: Ready interrupt
  31       - description: Handover interrupt
  32       - description: Stop acknowledge interrupt
  33       - description: Shutdown acknowledge interrupt
  34
  35   interrupt-names:
  36     items:
  37       - const: wdog
  38       - const: fatal
  39       - const: ready
  40       - const: handover
  41       - const: stop-ack
  42       - const: shutdown-ack
  43
  44   clocks:
  45     items:
  46       - description: GCC WPSS AHB BDG Master clock
  47       - description: GCC WPSS AHB clock
  48       - description: GCC WPSS RSCP clock
  49       - description: XO clock
  50
  51   clock-names:
  52     items:
  53       - const: ahb_bdg
  54       - const: ahb
  55       - const: rscp
  56       - const: xo
  57
  58   power-domains:
  59     items:
  60       - description: CX power domain
  61       - description: MX power domain
  62
  63   power-domain-names:
  64     items:
  65       - const: cx
  66       - const: mx
  67
  68   resets:
  69     items:
  70       - description: AOSS restart
  71       - description: PDC SYNC
  72
  73   reset-names:
  74     items:
  75       - const: restart
  76       - const: pdc_sync
  77
  78   memory-region:
  79     maxItems: 1
  80     description: Reference to the reserved-memory for the Hexagon core
  81
  82   firmware-name:
  83     $ref: /schemas/types.yaml#/definitions/string
  84     description:
  85       The name of the firmware which should be loaded for this remote
  86       processor.
  87
  88   qcom,halt-regs:
  89     $ref: /schemas/types.yaml#/definitions/phandle-array
  90     description:
  91       Phandle reference to a syscon representing TCSR followed by the
  92       three offsets within syscon for q6, modem and nc halt registers.
  93
  94   qcom,qmp:
  95     $ref: /schemas/types.yaml#/definitions/phandle
  96     description: Reference to the AOSS side-channel message RAM.
  97
  98   qcom,smem-states:
  99     $ref: /schemas/types.yaml#/definitions/phandle-array
 100     description: States used by the AP to signal the Hexagon core
 101     items:
 102       - description: Stop the modem
 103
 104   qcom,smem-state-names:
 105     description: The names of the state bits used for SMP2P output
 106     const: stop
 107
 108   glink-edge:
 109     $ref: qcom,glink-edge.yaml#
 110     unevaluatedProperties: false
 111     description:
 112       Qualcomm G-Link subnode which represents communication edge, channels
 113       and devices related to the ADSP.
 114
 115     properties:
 116       interrupts:
 117         items:
 118           - description: IRQ from WPSS to GLINK
 119
 120       mboxes:
 121         items:
 122           - description: Mailbox for communication between APPS and WPSS
 123
 124       label:
 125         items:
 126           - const: wpss
 127
 128       apr: false
 129       fastrpc: false
 130
 131 required:
 132   - compatible
 133   - reg
 134   - interrupts
 135   - interrupt-names
 136   - clocks
 137   - clock-names
 138   - power-domains
 139   - power-domain-names
 140   - resets
 141   - reset-names
 142   - qcom,halt-regs
 143   - memory-region
 144   - qcom,qmp
 145   - qcom,smem-states
 146   - qcom,smem-state-names
 147   - glink-edge
 148
 149 additionalProperties: false
 150
 151 examples:
 152   - |
 153     #include <dt-bindings/interrupt-controller/arm-gic.h>
 154     #include <dt-bindings/clock/qcom,gcc-sc7280.h>
 155     #include <dt-bindings/clock/qcom,rpmh.h>
 156     #include <dt-bindings/power/qcom-rpmpd.h>
 157     #include <dt-bindings/reset/qcom,sdm845-aoss.h>
 158     #include <dt-bindings/reset/qcom,sdm845-pdc.h>
 159     #include <dt-bindings/mailbox/qcom-ipcc.h>
 160     remoteproc@8a00000 {
 161         compatible = "qcom,sc7280-wpss-pil";
 162         reg = <0x08a00000 0x10000>;
 163
 164         interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
 165                               <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
 166                               <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
 167                               <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
 168                               <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
 169                               <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
 170         interrupt-names = "wdog", "fatal", "ready", "handover",
 171                           "stop-ack", "shutdown-ack";
 172
 173         clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
 174                  <&gcc GCC_WPSS_AHB_CLK>,
 175                  <&gcc GCC_WPSS_RSCP_CLK>,
 176                  <&rpmhcc RPMH_CXO_CLK>;
 177         clock-names = "ahb_bdg", "ahb",
 178                       "rscp", "xo";
 179
 180         power-domains = <&rpmhpd SC7280_CX>,
 181                         <&rpmhpd SC7280_MX>;
 182         power-domain-names = "cx", "mx";
 183
 184         memory-region = <&wpss_mem>;
 185
 186         qcom,qmp = <&aoss_qmp>;
 187
 188         qcom,smem-states = <&wpss_smp2p_out 0>;
 189         qcom,smem-state-names = "stop";
 190
 191         resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
 192                  <&pdc_reset PDC_WPSS_SYNC_RESET>;
 193         reset-names = "restart", "pdc_sync";
 194
 195         qcom,halt-regs = <&tcsr_mutex 0x37000>;
 196
 197         glink-edge {
 198             interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
 199                                          IPCC_MPROC_SIGNAL_GLINK_QMP
 200                                          IRQ_TYPE_EDGE_RISING>;
 201             mboxes = <&ipcc IPCC_CLIENT_WPSS
 202                             IPCC_MPROC_SIGNAL_GLINK_QMP>;
 203
 204             label = "wpss";
 205             qcom,remote-pid = <13>;
 206         };
 207     };