Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Samsung Exynos SoC Multi Core Timer (MCT)
   8
   9 maintainers:
  10   - Krzysztof Kozlowski <krzk@kernel.org>
  11
  12 description: |+
  13   The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
  14   global timer and CPU local timers. The global timer is a 64-bit free running
  15   up-counter and can generate 4 interrupts when the counter reaches one of the
  16   four preset counter values. The CPU local timers are 32-bit free running
  17   down-counters and generate an interrupt when the counter expires. There is
  18   one CPU local timer instantiated in MCT for every CPU in the system.
  19
  20 properties:
  21   compatible:
  22     oneOf:
  23       - enum:
  24           - samsung,exynos4210-mct
  25           - samsung,exynos4412-mct
  26       - items:
  27           - enum:
  28               - axis,artpec8-mct
  29               - samsung,exynos3250-mct
  30               - samsung,exynos5250-mct
  31               - samsung,exynos5260-mct
  32               - samsung,exynos5420-mct
  33               - samsung,exynos5433-mct
  34               - samsung,exynos850-mct
  35               - tesla,fsd-mct
  36           - const: samsung,exynos4210-mct
  37
  38   clocks:
  39     maxItems: 2
  40
  41   clock-names:
  42     items:
  43       - const: fin_pll
  44       - const: mct
  45
  46   reg:
  47     maxItems: 1
  48
  49   samsung,frc-shared:
  50     type: boolean
  51     description: |
  52       Indicates that the hardware requires that this processor share the
  53       free-running counter with a different (main) processor.
  54
  55   samsung,local-timers:
  56     $ref: /schemas/types.yaml#/definitions/uint32-array
  57     minItems: 1
  58     maxItems: 16
  59     description: |
  60       List of indices of local timers usable from this processor.
  61
  62   interrupts:
  63     description: |
  64       Interrupts should be put in specific order. This is, the local timer
  65       interrupts should be specified after the four global timer interrupts
  66       have been specified:
  67       0: Global Timer Interrupt 0
  68       1: Global Timer Interrupt 1
  69       2: Global Timer Interrupt 2
  70       3: Global Timer Interrupt 3
  71       4: Local Timer Interrupt 0
  72       5: Local Timer Interrupt 1
  73       6: ..
  74       7: ..
  75       i: Local Timer Interrupt n
  76       For MCT block that uses a per-processor interrupt for local timers, such
  77       as ones compatible with "samsung,exynos4412-mct", only one local timer
  78       interrupt might be specified, meaning that all local timers use the same
  79       per processor interrupt.
  80     minItems: 5               # 4 Global + 1 local
  81     maxItems: 20              # 4 Global + 16 local
  82
  83 required:
  84   - compatible
  85   - clock-names
  86   - clocks
  87   - interrupts
  88   - reg
  89
  90 allOf:
  91   - if:
  92       not:
  93         properties:
  94           compatible:
  95             contains:
  96               enum:
  97                 - axis,artpec8-mct
  98     then:
  99       properties:
 100         samsung,local-timers: false
 101         samsung,frc-shared: false
 102   - if:
 103       properties:
 104         compatible:
 105           contains:
 106             const: samsung,exynos3250-mct
 107     then:
 108       properties:
 109         interrupts:
 110           minItems: 8
 111           maxItems: 8
 112
 113   - if:
 114       properties:
 115         compatible:
 116           contains:
 117             const: samsung,exynos5250-mct
 118     then:
 119       properties:
 120         interrupts:
 121           minItems: 6
 122           maxItems: 6
 123
 124   - if:
 125       properties:
 126         compatible:
 127           contains:
 128             enum:
 129               - axis,artpec8-mct
 130               - samsung,exynos5260-mct
 131               - samsung,exynos5420-mct
 132               - samsung,exynos5433-mct
 133               - samsung,exynos850-mct
 134     then:
 135       properties:
 136         interrupts:
 137           minItems: 12
 138           maxItems: 12
 139
 140   - if:
 141       properties:
 142         compatible:
 143           contains:
 144             enum:
 145               - tesla,fsd-mct
 146     then:
 147       properties:
 148         interrupts:
 149           minItems: 16
 150           maxItems: 16
 151
 152 additionalProperties: false
 153
 154 examples:
 155   - |
 156     // In this example, the IP contains two local timers, using separate
 157     // interrupts, so two local timer interrupts have been specified,
 158     // in addition to four global timer interrupts.
 159     #include <dt-bindings/clock/exynos4.h>
 160     #include <dt-bindings/interrupt-controller/arm-gic.h>
 161
 162     timer@10050000 {
 163         compatible = "samsung,exynos4210-mct";
 164         reg = <0x10050000 0x800>;
 165         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
 166         clock-names = "fin_pll", "mct";
 167
 168         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 169                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 170                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 171                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
 172                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 173                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 174     };
 175
 176   - |
 177     // In this example, the timer interrupts are connected to two separate
 178     // interrupt controllers. Hence, an interrupts-extended is needed.
 179     #include <dt-bindings/clock/exynos4.h>
 180     #include <dt-bindings/interrupt-controller/arm-gic.h>
 181
 182     timer@101c0000 {
 183         compatible = "samsung,exynos4210-mct";
 184         reg = <0x101C0000 0x800>;
 185         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
 186         clock-names = "fin_pll", "mct";
 187
 188         interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 189                               <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 190                               <&combiner 12 6>,
 191                               <&combiner 12 7>,
 192                               <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 193                               <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 194     };
 195
 196   - |
 197     // In this example, the IP contains four local timers, but using
 198     // a per-processor interrupt to handle them. Only one first local
 199     // interrupt is specified.
 200     #include <dt-bindings/clock/exynos4.h>
 201     #include <dt-bindings/interrupt-controller/arm-gic.h>
 202
 203     timer@10050000 {
 204         compatible = "samsung,exynos4412-mct";
 205         reg = <0x10050000 0x800>;
 206         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
 207         clock-names = "fin_pll", "mct";
 208
 209         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 210                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 211                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 212                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
 213                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
 214     };
 215
 216   - |
 217     // In this example, the IP contains four local timers, but using
 218     // a per-processor interrupt to handle them. All the local timer
 219     // interrupts are specified.
 220     #include <dt-bindings/clock/exynos4.h>
 221     #include <dt-bindings/interrupt-controller/arm-gic.h>
 222
 223     timer@10050000 {
 224         compatible = "samsung,exynos4412-mct";
 225         reg = <0x10050000 0x800>;
 226         clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
 227         clock-names = "fin_pll", "mct";
 228
 229         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 230                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 231                      <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 232                      <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
 233                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
 234                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
 235                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
 236                      <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
 237     };