arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for CZ.NIC Turris Mox Board
   4  * 2019 by Marek Behún <kabel@kernel.org>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/bus/moxtet.h>
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/input/input.h>
  12 #include "armada-372x.dtsi"
  13
  14 / {
  15         model = "CZ.NIC Turris Mox Board";
  16         compatible = "cznic,turris-mox", "marvell,armada3720",
  17                      "marvell,armada3700";
  18
  19         aliases {
  20                 spi0 = &spi0;
  21                 ethernet0 = &eth0;
  22                 ethernet1 = &eth1;
  23                 mmc0 = &sdhci0;
  24                 mmc1 = &sdhci1;
  25         };
  26
  27         chosen {
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         memory@0 {
  32                 device_type = "memory";
  33                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38                 led {
  39                         label = "mox:red:activity";
  40                         gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>;
  41                         linux,default-trigger = "default-on";
  42                 };
  43         };
  44
  45         gpio-keys {
  46                 compatible = "gpio-keys";
  47
  48                 key-reset {
  49                         label = "reset";
  50                         linux,code = <KEY_RESTART>;
  51                         gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>;
  52                         debounce-interval = <60>;
  53                 };
  54         };
  55
  56         exp_usb3_vbus: usb3-vbus {
  57                 compatible = "regulator-fixed";
  58                 regulator-name = "usb3-vbus";
  59                 regulator-min-microvolt = <5000000>;
  60                 regulator-max-microvolt = <5000000>;
  61                 enable-active-high;
  62                 regulator-always-on;
  63                 gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
  64         };
  65
  66         vsdc_reg: vsdc-reg {
  67                 compatible = "regulator-gpio";
  68                 regulator-name = "vsdc";
  69                 regulator-min-microvolt = <1800000>;
  70                 regulator-max-microvolt = <3300000>;
  71                 regulator-boot-on;
  72
  73                 gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
  74                 gpios-states = <0>;
  75                 states = <1800000 0x1
  76                           3300000 0x0>;
  77                 enable-active-high;
  78         };
  79
  80         vsdio_reg: vsdio-reg {
  81                 compatible = "regulator-gpio";
  82                 regulator-name = "vsdio";
  83                 regulator-min-microvolt = <1800000>;
  84                 regulator-max-microvolt = <3300000>;
  85                 regulator-boot-on;
  86
  87                 gpios = <&gpiosb 22 GPIO_ACTIVE_HIGH>;
  88                 gpios-states = <0>;
  89                 states = <1800000 0x1
  90                           3300000 0x0>;
  91                 enable-active-high;
  92         };
  93
  94         sdhci1_pwrseq: sdhci1-pwrseq {
  95                 compatible = "mmc-pwrseq-simple";
  96                 reset-gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
  97                 status = "okay";
  98         };
  99
 100         sfp: sfp {
 101                 compatible = "sff,sfp";
 102                 i2c-bus = <&i2c0>;
 103                 los-gpios = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>;
 104                 tx-fault-gpios = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>;
 105                 mod-def0-gpios = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>;
 106                 tx-disable-gpios = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>;
 107                 rate-select0-gpios = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>;
 108                 maximum-power-milliwatt = <3000>;
 109
 110                 /* enabled by U-Boot if SFP module is present */
 111                 status = "disabled";
 112         };
 113
 114         firmware {
 115                 armada-3700-rwtm {
 116                         compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";
 117                 };
 118         };
 119 };
 120
 121 &i2c0 {
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&i2c1_pins>;
 124         clock-frequency = <100000>;
 125         /delete-property/ mrvl,i2c-fast-mode;
 126         status = "okay";
 127
 128         /* MCP7940MT-I/MNY RTC */
 129         rtc@6f {
 130                 compatible = "microchip,mcp7940x";
 131                 reg = <0x6f>;
 132                 interrupt-parent = <&gpiosb>;
 133                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO2_5 */
 134         };
 135 };
 136
 137 &pcie0 {
 138         pinctrl-names = "default";
 139         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
 140         status = "okay";
 141         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
 142         slot-power-limit-milliwatt = <10000>;
 143         /*
 144          * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
 145          * contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and
 146          * 2 size cells and also expects that the second range starts at 16 MB offset. Also it
 147          * expects that first range uses same address for PCI (child) and CPU (parent) cells (so
 148          * no remapping) and that this address is the lowest from all specified ranges. If these
 149          * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address
 150          * space is 128 MB long, so the best split between MEM and IO is to use fixed 16 MB window
 151          * for IO and the rest 112 MB (64+32+16) for MEM, despite that maximal IO size is just 64 kB.
 152          * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in
 153          * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix):
 154          * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7
 155          * https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf
 156          * https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33
 157          * Bug related to requirement of same child and parent addresses for first range is fixed
 158          * in U-Boot version 2022.04 by following commit:
 159          * https://source.denx.de/u-boot/u-boot/-/commit/1fd54253bca7d43d046bba4853fe5fafd034bc17
 160          */
 161         #address-cells = <3>;
 162         #size-cells = <2>;
 163         ranges = <0x81000000 0 0xe8000000   0 0xe8000000   0 0x01000000   /* Port 0 IO */
 164                   0x82000000 0 0xe9000000   0 0xe9000000   0 0x07000000>; /* Port 0 MEM */
 165
 166         /* enabled by U-Boot if PCIe module is present */
 167         status = "disabled";
 168 };
 169
 170 &uart0 {
 171         status = "okay";
 172 };
 173
 174 &eth0 {
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&rgmii_pins>;
 177         phy-mode = "rgmii-id";
 178         phy-handle = <&phy1>;
 179         status = "okay";
 180 };
 181
 182 &eth1 {
 183         phy-mode = "2500base-x";
 184         managed = "in-band-status";
 185         phys = <&comphy0 1>;
 186 };
 187
 188 &sdhci0 {
 189         wp-inverted;
 190         bus-width = <4>;
 191         cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
 192         vqmmc-supply = <&vsdc_reg>;
 193         marvell,pad-type = "sd";
 194         status = "okay";
 195 };
 196
 197 &sdhci1 {
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&sdio_pins>;
 200         non-removable;
 201         bus-width = <4>;
 202         marvell,pad-type = "sd";
 203         vqmmc-supply = <&vsdio_reg>;
 204         mmc-pwrseq = <&sdhci1_pwrseq>;
 205         /* forbid SDR104 for FCC purposes */
 206         sdhci-caps-mask = <0x2 0x0>;
 207         status = "okay";
 208 };
 209
 210 &spi0 {
 211         status = "okay";
 212         pinctrl-names = "default";
 213         pinctrl-0 = <&spi_quad_pins &spi_cs1_pins>;
 214         assigned-clocks = <&nb_periph_clk 7>;
 215         assigned-clock-parents = <&tbg 1>;
 216         assigned-clock-rates = <20000000>;
 217
 218         flash@0 {
 219                 compatible = "jedec,spi-nor";
 220                 reg = <0>;
 221                 spi-max-frequency = <20000000>;
 222
 223                 partitions {
 224                         compatible = "fixed-partitions";
 225                         #address-cells = <1>;
 226                         #size-cells = <1>;
 227
 228                         partition@0 {
 229                                 label = "secure-firmware";
 230                                 reg = <0x0 0x20000>;
 231                         };
 232
 233                         partition@20000 {
 234                                 label = "a53-firmware";
 235                                 reg = <0x20000 0x160000>;
 236                         };
 237
 238                         partition@180000 {
 239                                 label = "u-boot-env";
 240                                 reg = <0x180000 0x10000>;
 241                         };
 242
 243                         partition@190000 {
 244                                 label = "Rescue system";
 245                                 reg = <0x190000 0x660000>;
 246                         };
 247
 248                         partition@7f0000 {
 249                                 label = "dtb";
 250                                 reg = <0x7f0000 0x10000>;
 251                         };
 252                 };
 253         };
 254
 255         moxtet: moxtet@1 {
 256                 #address-cells = <1>;
 257                 #size-cells = <0>;
 258                 compatible = "cznic,moxtet";
 259                 reg = <1>;
 260                 reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
 261                 spi-max-frequency = <10000000>;
 262                 spi-cpol;
 263                 spi-cpha;
 264                 interrupt-controller;
 265                 #interrupt-cells = <1>;
 266                 interrupt-parent = <&gpiosb>;
 267                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
 268                 status = "okay";
 269
 270                 moxtet_sfp: gpio@0 {
 271                         compatible = "cznic,moxtet-gpio";
 272                         gpio-controller;
 273                         #gpio-cells = <2>;
 274                         reg = <0>;
 275                         status = "disabled";
 276                 };
 277         };
 278 };
 279
 280 &usb2 {
 281         status = "okay";
 282 };
 283
 284 &comphy2 {
 285         connector {
 286                 compatible = "usb-a-connector";
 287                 phy-supply = <&exp_usb3_vbus>;
 288         };
 289 };
 290
 291 &usb3 {
 292         status = "okay";
 293         phys = <&comphy2 0>;
 294 };
 295
 296 &mdio {
 297         pinctrl-names = "default";
 298         pinctrl-0 = <&smi_pins>;
 299         status = "okay";
 300
 301         phy1: ethernet-phy@1 {
 302                 reg = <1>;
 303         };
 304
 305         /*
 306          * NOTE: switch nodes are enabled by U-Boot if modules are present
 307          * DO NOT change this node name (switch0@10) even if it is not following
 308          * conventions! Deployed U-Boot binaries are explicitly looking for
 309          * this node in order to augment the device tree!
 310          * Also do not touch the "ports" or "port@n" nodes. These are also ABI.
 311          */
 312         switch0@10 {
 313                 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
 314                 reg = <0x10>;
 315                 dsa,member = <0 0>;
 316                 interrupt-parent = <&moxtet>;
 317                 interrupts = <MOXTET_IRQ_PERIDOT(0)>;
 318                 status = "disabled";
 319
 320                 mdio {
 321                         #address-cells = <1>;
 322                         #size-cells = <0>;
 323
 324                         switch0phy1: ethernet-phy@1 {
 325                                 reg = <0x1>;
 326                         };
 327
 328                         switch0phy2: ethernet-phy@2 {
 329                                 reg = <0x2>;
 330                         };
 331
 332                         switch0phy3: ethernet-phy@3 {
 333                                 reg = <0x3>;
 334                         };
 335
 336                         switch0phy4: ethernet-phy@4 {
 337                                 reg = <0x4>;
 338                         };
 339
 340                         switch0phy5: ethernet-phy@5 {
 341                                 reg = <0x5>;
 342                         };
 343
 344                         switch0phy6: ethernet-phy@6 {
 345                                 reg = <0x6>;
 346                         };
 347
 348                         switch0phy7: ethernet-phy@7 {
 349                                 reg = <0x7>;
 350                         };
 351
 352                         switch0phy8: ethernet-phy@8 {
 353                                 reg = <0x8>;
 354                         };
 355                 };
 356
 357                 ports {
 358                         #address-cells = <1>;
 359                         #size-cells = <0>;
 360
 361                         port@1 {
 362                                 reg = <0x1>;
 363                                 label = "lan1";
 364                                 phy-handle = <&switch0phy1>;
 365                         };
 366
 367                         port@2 {
 368                                 reg = <0x2>;
 369                                 label = "lan2";
 370                                 phy-handle = <&switch0phy2>;
 371                         };
 372
 373                         port@3 {
 374                                 reg = <0x3>;
 375                                 label = "lan3";
 376                                 phy-handle = <&switch0phy3>;
 377                         };
 378
 379                         port@4 {
 380                                 reg = <0x4>;
 381                                 label = "lan4";
 382                                 phy-handle = <&switch0phy4>;
 383                         };
 384
 385                         port@5 {
 386                                 reg = <0x5>;
 387                                 label = "lan5";
 388                                 phy-handle = <&switch0phy5>;
 389                         };
 390
 391                         port@6 {
 392                                 reg = <0x6>;
 393                                 label = "lan6";
 394                                 phy-handle = <&switch0phy6>;
 395                         };
 396
 397                         port@7 {
 398                                 reg = <0x7>;
 399                                 label = "lan7";
 400                                 phy-handle = <&switch0phy7>;
 401                         };
 402
 403                         port@8 {
 404                                 reg = <0x8>;
 405                                 label = "lan8";
 406                                 phy-handle = <&switch0phy8>;
 407                         };
 408
 409                         port@9 {
 410                                 reg = <0x9>;
 411                                 label = "cpu";
 412                                 ethernet = <&eth1>;
 413                                 phy-mode = "2500base-x";
 414                                 managed = "in-band-status";
 415                         };
 416
 417                         switch0port10: port@a {
 418                                 reg = <0xa>;
 419                                 label = "dsa";
 420                                 phy-mode = "2500base-x";
 421                                 managed = "in-band-status";
 422                                 link = <&switch1port9 &switch2port9>;
 423                                 status = "disabled";
 424                         };
 425
 426                         port-sfp@a {
 427                                 reg = <0xa>;
 428                                 label = "sfp";
 429                                 sfp = <&sfp>;
 430                                 phy-mode = "sgmii";
 431                                 managed = "in-band-status";
 432                                 status = "disabled";
 433                         };
 434                 };
 435         };
 436
 437         /* NOTE: this node name is ABI, don't change it! */
 438         switch0@2 {
 439                 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
 440                 reg = <0x2>;
 441                 dsa,member = <0 0>;
 442                 interrupt-parent = <&moxtet>;
 443                 interrupts = <MOXTET_IRQ_TOPAZ>;
 444                 status = "disabled";
 445
 446                 mdio {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449
 450                         switch0phy1_topaz: ethernet-phy@11 {
 451                                 reg = <0x11>;
 452                         };
 453
 454                         switch0phy2_topaz: ethernet-phy@12 {
 455                                 reg = <0x12>;
 456                         };
 457
 458                         switch0phy3_topaz: ethernet-phy@13 {
 459                                 reg = <0x13>;
 460                         };
 461
 462                         switch0phy4_topaz: ethernet-phy@14 {
 463                                 reg = <0x14>;
 464                         };
 465                 };
 466
 467                 ports {
 468                         #address-cells = <1>;
 469                         #size-cells = <0>;
 470
 471                         port@1 {
 472                                 reg = <0x1>;
 473                                 label = "lan1";
 474                                 phy-handle = <&switch0phy1_topaz>;
 475                         };
 476
 477                         port@2 {
 478                                 reg = <0x2>;
 479                                 label = "lan2";
 480                                 phy-handle = <&switch0phy2_topaz>;
 481                         };
 482
 483                         port@3 {
 484                                 reg = <0x3>;
 485                                 label = "lan3";
 486                                 phy-handle = <&switch0phy3_topaz>;
 487                         };
 488
 489                         port@4 {
 490                                 reg = <0x4>;
 491                                 label = "lan4";
 492                                 phy-handle = <&switch0phy4_topaz>;
 493                         };
 494
 495                         port@5 {
 496                                 reg = <0x5>;
 497                                 label = "cpu";
 498                                 phy-mode = "2500base-x";
 499                                 managed = "in-band-status";
 500                                 ethernet = <&eth1>;
 501                         };
 502                 };
 503         };
 504
 505         /* NOTE: this node name is ABI, don't change it! */
 506         switch1@11 {
 507                 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
 508                 reg = <0x11>;
 509                 dsa,member = <0 1>;
 510                 interrupt-parent = <&moxtet>;
 511                 interrupts = <MOXTET_IRQ_PERIDOT(1)>;
 512                 status = "disabled";
 513
 514                 mdio {
 515                         #address-cells = <1>;
 516                         #size-cells = <0>;
 517
 518                         switch1phy1: ethernet-phy@1 {
 519                                 reg = <0x1>;
 520                         };
 521
 522                         switch1phy2: ethernet-phy@2 {
 523                                 reg = <0x2>;
 524                         };
 525
 526                         switch1phy3: ethernet-phy@3 {
 527                                 reg = <0x3>;
 528                         };
 529
 530                         switch1phy4: ethernet-phy@4 {
 531                                 reg = <0x4>;
 532                         };
 533
 534                         switch1phy5: ethernet-phy@5 {
 535                                 reg = <0x5>;
 536                         };
 537
 538                         switch1phy6: ethernet-phy@6 {
 539                                 reg = <0x6>;
 540                         };
 541
 542                         switch1phy7: ethernet-phy@7 {
 543                                 reg = <0x7>;
 544                         };
 545
 546                         switch1phy8: ethernet-phy@8 {
 547                                 reg = <0x8>;
 548                         };
 549                 };
 550
 551                 ports {
 552                         #address-cells = <1>;
 553                         #size-cells = <0>;
 554
 555                         port@1 {
 556                                 reg = <0x1>;
 557                                 label = "lan9";
 558                                 phy-handle = <&switch1phy1>;
 559                         };
 560
 561                         port@2 {
 562                                 reg = <0x2>;
 563                                 label = "lan10";
 564                                 phy-handle = <&switch1phy2>;
 565                         };
 566
 567                         port@3 {
 568                                 reg = <0x3>;
 569                                 label = "lan11";
 570                                 phy-handle = <&switch1phy3>;
 571                         };
 572
 573                         port@4 {
 574                                 reg = <0x4>;
 575                                 label = "lan12";
 576                                 phy-handle = <&switch1phy4>;
 577                         };
 578
 579                         port@5 {
 580                                 reg = <0x5>;
 581                                 label = "lan13";
 582                                 phy-handle = <&switch1phy5>;
 583                         };
 584
 585                         port@6 {
 586                                 reg = <0x6>;
 587                                 label = "lan14";
 588                                 phy-handle = <&switch1phy6>;
 589                         };
 590
 591                         port@7 {
 592                                 reg = <0x7>;
 593                                 label = "lan15";
 594                                 phy-handle = <&switch1phy7>;
 595                         };
 596
 597                         port@8 {
 598                                 reg = <0x8>;
 599                                 label = "lan16";
 600                                 phy-handle = <&switch1phy8>;
 601                         };
 602
 603                         switch1port9: port@9 {
 604                                 reg = <0x9>;
 605                                 label = "dsa";
 606                                 phy-mode = "2500base-x";
 607                                 managed = "in-band-status";
 608                                 link = <&switch0port10>;
 609                         };
 610
 611                         switch1port10: port@a {
 612                                 reg = <0xa>;
 613                                 label = "dsa";
 614                                 phy-mode = "2500base-x";
 615                                 managed = "in-band-status";
 616                                 link = <&switch2port9>;
 617                                 status = "disabled";
 618                         };
 619
 620                         port-sfp@a {
 621                                 reg = <0xa>;
 622                                 label = "sfp";
 623                                 sfp = <&sfp>;
 624                                 phy-mode = "sgmii";
 625                                 managed = "in-band-status";
 626                                 status = "disabled";
 627                         };
 628                 };
 629         };
 630
 631         /* NOTE: this node name is ABI, don't change it! */
 632         switch1@2 {
 633                 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
 634                 reg = <0x2>;
 635                 dsa,member = <0 1>;
 636                 interrupt-parent = <&moxtet>;
 637                 interrupts = <MOXTET_IRQ_TOPAZ>;
 638                 status = "disabled";
 639
 640                 mdio {
 641                         #address-cells = <1>;
 642                         #size-cells = <0>;
 643
 644                         switch1phy1_topaz: ethernet-phy@11 {
 645                                 reg = <0x11>;
 646                         };
 647
 648                         switch1phy2_topaz: ethernet-phy@12 {
 649                                 reg = <0x12>;
 650                         };
 651
 652                         switch1phy3_topaz: ethernet-phy@13 {
 653                                 reg = <0x13>;
 654                         };
 655
 656                         switch1phy4_topaz: ethernet-phy@14 {
 657                                 reg = <0x14>;
 658                         };
 659                 };
 660
 661                 ports {
 662                         #address-cells = <1>;
 663                         #size-cells = <0>;
 664
 665                         port@1 {
 666                                 reg = <0x1>;
 667                                 label = "lan9";
 668                                 phy-handle = <&switch1phy1_topaz>;
 669                         };
 670
 671                         port@2 {
 672                                 reg = <0x2>;
 673                                 label = "lan10";
 674                                 phy-handle = <&switch1phy2_topaz>;
 675                         };
 676
 677                         port@3 {
 678                                 reg = <0x3>;
 679                                 label = "lan11";
 680                                 phy-handle = <&switch1phy3_topaz>;
 681                         };
 682
 683                         port@4 {
 684                                 reg = <0x4>;
 685                                 label = "lan12";
 686                                 phy-handle = <&switch1phy4_topaz>;
 687                         };
 688
 689                         port@5 {
 690                                 reg = <0x5>;
 691                                 label = "dsa";
 692                                 phy-mode = "2500base-x";
 693                                 managed = "in-band-status";
 694                                 link = <&switch0port10>;
 695                         };
 696                 };
 697         };
 698
 699         /* NOTE: this node name is ABI, don't change it! */
 700         switch2@12 {
 701                 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
 702                 reg = <0x12>;
 703                 dsa,member = <0 2>;
 704                 interrupt-parent = <&moxtet>;
 705                 interrupts = <MOXTET_IRQ_PERIDOT(2)>;
 706                 status = "disabled";
 707
 708                 mdio {
 709                         #address-cells = <1>;
 710                         #size-cells = <0>;
 711
 712                         switch2phy1: ethernet-phy@1 {
 713                                 reg = <0x1>;
 714                         };
 715
 716                         switch2phy2: ethernet-phy@2 {
 717                                 reg = <0x2>;
 718                         };
 719
 720                         switch2phy3: ethernet-phy@3 {
 721                                 reg = <0x3>;
 722                         };
 723
 724                         switch2phy4: ethernet-phy@4 {
 725                                 reg = <0x4>;
 726                         };
 727
 728                         switch2phy5: ethernet-phy@5 {
 729                                 reg = <0x5>;
 730                         };
 731
 732                         switch2phy6: ethernet-phy@6 {
 733                                 reg = <0x6>;
 734                         };
 735
 736                         switch2phy7: ethernet-phy@7 {
 737                                 reg = <0x7>;
 738                         };
 739
 740                         switch2phy8: ethernet-phy@8 {
 741                                 reg = <0x8>;
 742                         };
 743                 };
 744
 745                 ports {
 746                         #address-cells = <1>;
 747                         #size-cells = <0>;
 748
 749                         port@1 {
 750                                 reg = <0x1>;
 751                                 label = "lan17";
 752                                 phy-handle = <&switch2phy1>;
 753                         };
 754
 755                         port@2 {
 756                                 reg = <0x2>;
 757                                 label = "lan18";
 758                                 phy-handle = <&switch2phy2>;
 759                         };
 760
 761                         port@3 {
 762                                 reg = <0x3>;
 763                                 label = "lan19";
 764                                 phy-handle = <&switch2phy3>;
 765                         };
 766
 767                         port@4 {
 768                                 reg = <0x4>;
 769                                 label = "lan20";
 770                                 phy-handle = <&switch2phy4>;
 771                         };
 772
 773                         port@5 {
 774                                 reg = <0x5>;
 775                                 label = "lan21";
 776                                 phy-handle = <&switch2phy5>;
 777                         };
 778
 779                         port@6 {
 780                                 reg = <0x6>;
 781                                 label = "lan22";
 782                                 phy-handle = <&switch2phy6>;
 783                         };
 784
 785                         port@7 {
 786                                 reg = <0x7>;
 787                                 label = "lan23";
 788                                 phy-handle = <&switch2phy7>;
 789                         };
 790
 791                         port@8 {
 792                                 reg = <0x8>;
 793                                 label = "lan24";
 794                                 phy-handle = <&switch2phy8>;
 795                         };
 796
 797                         switch2port9: port@9 {
 798                                 reg = <0x9>;
 799                                 label = "dsa";
 800                                 phy-mode = "2500base-x";
 801                                 managed = "in-band-status";
 802                                 link = <&switch1port10 &switch0port10>;
 803                         };
 804
 805                         port-sfp@a {
 806                                 reg = <0xa>;
 807                                 label = "sfp";
 808                                 sfp = <&sfp>;
 809                                 phy-mode = "sgmii";
 810                                 managed = "in-band-status";
 811                                 status = "disabled";
 812                         };
 813                 };
 814         };
 815
 816         /* NOTE: this node name is ABI, don't change it! */
 817         switch2@2 {
 818                 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
 819                 reg = <0x2>;
 820                 dsa,member = <0 2>;
 821                 interrupt-parent = <&moxtet>;
 822                 interrupts = <MOXTET_IRQ_TOPAZ>;
 823                 status = "disabled";
 824
 825                 mdio {
 826                         #address-cells = <1>;
 827                         #size-cells = <0>;
 828
 829                         switch2phy1_topaz: ethernet-phy@11 {
 830                                 reg = <0x11>;
 831                         };
 832
 833                         switch2phy2_topaz: ethernet-phy@12 {
 834                                 reg = <0x12>;
 835                         };
 836
 837                         switch2phy3_topaz: ethernet-phy@13 {
 838                                 reg = <0x13>;
 839                         };
 840
 841                         switch2phy4_topaz: ethernet-phy@14 {
 842                                 reg = <0x14>;
 843                         };
 844                 };
 845
 846                 ports {
 847                         #address-cells = <1>;
 848                         #size-cells = <0>;
 849
 850                         port@1 {
 851                                 reg = <0x1>;
 852                                 label = "lan17";
 853                                 phy-handle = <&switch2phy1_topaz>;
 854                         };
 855
 856                         port@2 {
 857                                 reg = <0x2>;
 858                                 label = "lan18";
 859                                 phy-handle = <&switch2phy2_topaz>;
 860                         };
 861
 862                         port@3 {
 863                                 reg = <0x3>;
 864                                 label = "lan19";
 865                                 phy-handle = <&switch2phy3_topaz>;
 866                         };
 867
 868                         port@4 {
 869                                 reg = <0x4>;
 870                                 label = "lan20";
 871                                 phy-handle = <&switch2phy4_topaz>;
 872                         };
 873
 874                         port@5 {
 875                                 reg = <0x5>;
 876                                 label = "dsa";
 877                                 phy-mode = "2500base-x";
 878                                 managed = "in-band-status";
 879                                 link = <&switch1port10 &switch0port10>;
 880                         };
 881                 };
 882         };
 883 };