1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/topology.h>
10 /* attempt to consolidate cpu attributes */
14 /* some have two possibilities for cpuid string */
15 const char *c_ident[2];
17 void (*c_early_init)(struct cpuinfo_x86 *);
18 void (*c_bsp_init)(struct cpuinfo_x86 *);
19 void (*c_init)(struct cpuinfo_x86 *);
20 void (*c_identify)(struct cpuinfo_x86 *);
21 void (*c_detect_tlb)(struct cpuinfo_x86 *);
24 /* Optional vendor specific routine to obtain the cache size. */
25 unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *,
28 /* Family/stepping-based lookup table for model names. */
29 struct legacy_cpu_model_info {
31 const char *model_names[16];
37 unsigned char descriptor;
40 /* unsigned int ways; */
44 #define cpu_dev_register(cpu_devX) \
45 static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
46 __section(".x86_cpu_dev.init") = \
49 extern const struct cpu_dev *const __x86_cpu_dev_start[],
50 *const __x86_cpu_dev_end[];
52 #ifdef CONFIG_CPU_SUP_INTEL
53 enum tsx_ctrl_states {
56 TSX_CTRL_RTM_ALWAYS_ABORT,
57 TSX_CTRL_NOT_SUPPORTED,
60 extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state;
62 extern void __init tsx_init(void);
63 void tsx_ap_init(void);
65 static inline void tsx_init(void) { }
66 static inline void tsx_ap_init(void) { }
67 #endif /* CONFIG_CPU_SUP_INTEL */
69 extern void init_spectral_chicken(struct cpuinfo_x86 *c);
71 extern void get_cpu_cap(struct cpuinfo_x86 *c);
72 extern void get_cpu_address_sizes(struct cpuinfo_x86 *c);
73 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
74 extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
75 extern void init_intel_cacheinfo(struct cpuinfo_x86 *c);
76 extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
77 extern void init_hygon_cacheinfo(struct cpuinfo_x86 *c);
79 extern int detect_extended_topology(struct cpuinfo_x86 *c);
80 extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);
82 void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c);
83 void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c);
85 unsigned int aperfmperf_get_khz(int cpu);
86 void cpu_select_mitigations(void);
88 extern void x86_spec_ctrl_setup_ap(void);
89 extern void update_srbds_msr(void);
90 extern void update_gds_msr(void);
92 extern enum spectre_v2_mitigation spectre_v2_enabled;
94 static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)
96 return mode == SPECTRE_V2_EIBRS ||
97 mode == SPECTRE_V2_EIBRS_RETPOLINE ||
98 mode == SPECTRE_V2_EIBRS_LFENCE;
101 #endif /* ARCH_X86_CPU_H */