Merge tag 'for-6.9-part2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[sfrench/cifs-2.6.git] / arch / x86 / kernel / cpu / mshyperv.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * HyperV  Detection code.
4  *
5  * Copyright (C) 2010, Novell, Inc.
6  * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
7  */
8
9 #include <linux/types.h>
10 #include <linux/time.h>
11 #include <linux/clocksource.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/hardirq.h>
15 #include <linux/efi.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kexec.h>
19 #include <linux/i8253.h>
20 #include <linux/random.h>
21 #include <asm/processor.h>
22 #include <asm/hypervisor.h>
23 #include <asm/hyperv-tlfs.h>
24 #include <asm/mshyperv.h>
25 #include <asm/desc.h>
26 #include <asm/idtentry.h>
27 #include <asm/irq_regs.h>
28 #include <asm/i8259.h>
29 #include <asm/apic.h>
30 #include <asm/timer.h>
31 #include <asm/reboot.h>
32 #include <asm/nmi.h>
33 #include <clocksource/hyperv_timer.h>
34 #include <asm/numa.h>
35 #include <asm/svm.h>
36
37 /* Is Linux running as the root partition? */
38 bool hv_root_partition;
39 /* Is Linux running on nested Microsoft Hypervisor */
40 bool hv_nested;
41 struct ms_hyperv_info ms_hyperv;
42
43 /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */
44 bool hyperv_paravisor_present __ro_after_init;
45 EXPORT_SYMBOL_GPL(hyperv_paravisor_present);
46
47 #if IS_ENABLED(CONFIG_HYPERV)
48 static inline unsigned int hv_get_nested_reg(unsigned int reg)
49 {
50         if (hv_is_sint_reg(reg))
51                 return reg - HV_REGISTER_SINT0 + HV_REGISTER_NESTED_SINT0;
52
53         switch (reg) {
54         case HV_REGISTER_SIMP:
55                 return HV_REGISTER_NESTED_SIMP;
56         case HV_REGISTER_SIEFP:
57                 return HV_REGISTER_NESTED_SIEFP;
58         case HV_REGISTER_SVERSION:
59                 return HV_REGISTER_NESTED_SVERSION;
60         case HV_REGISTER_SCONTROL:
61                 return HV_REGISTER_NESTED_SCONTROL;
62         case HV_REGISTER_EOM:
63                 return HV_REGISTER_NESTED_EOM;
64         default:
65                 return reg;
66         }
67 }
68
69 u64 hv_get_non_nested_register(unsigned int reg)
70 {
71         u64 value;
72
73         if (hv_is_synic_reg(reg) && ms_hyperv.paravisor_present)
74                 hv_ivm_msr_read(reg, &value);
75         else
76                 rdmsrl(reg, value);
77         return value;
78 }
79 EXPORT_SYMBOL_GPL(hv_get_non_nested_register);
80
81 void hv_set_non_nested_register(unsigned int reg, u64 value)
82 {
83         if (hv_is_synic_reg(reg) && ms_hyperv.paravisor_present) {
84                 hv_ivm_msr_write(reg, value);
85
86                 /* Write proxy bit via wrmsl instruction */
87                 if (hv_is_sint_reg(reg))
88                         wrmsrl(reg, value | 1 << 20);
89         } else {
90                 wrmsrl(reg, value);
91         }
92 }
93 EXPORT_SYMBOL_GPL(hv_set_non_nested_register);
94
95 u64 hv_get_register(unsigned int reg)
96 {
97         if (hv_nested)
98                 reg = hv_get_nested_reg(reg);
99
100         return hv_get_non_nested_register(reg);
101 }
102 EXPORT_SYMBOL_GPL(hv_get_register);
103
104 void hv_set_register(unsigned int reg, u64 value)
105 {
106         if (hv_nested)
107                 reg = hv_get_nested_reg(reg);
108
109         hv_set_non_nested_register(reg, value);
110 }
111 EXPORT_SYMBOL_GPL(hv_set_register);
112
113 static void (*vmbus_handler)(void);
114 static void (*hv_stimer0_handler)(void);
115 static void (*hv_kexec_handler)(void);
116 static void (*hv_crash_handler)(struct pt_regs *regs);
117
118 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
119 {
120         struct pt_regs *old_regs = set_irq_regs(regs);
121
122         inc_irq_stat(irq_hv_callback_count);
123         if (vmbus_handler)
124                 vmbus_handler();
125
126         if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
127                 apic_eoi();
128
129         set_irq_regs(old_regs);
130 }
131
132 void hv_setup_vmbus_handler(void (*handler)(void))
133 {
134         vmbus_handler = handler;
135 }
136
137 void hv_remove_vmbus_handler(void)
138 {
139         /* We have no way to deallocate the interrupt gate */
140         vmbus_handler = NULL;
141 }
142
143 /*
144  * Routines to do per-architecture handling of stimer0
145  * interrupts when in Direct Mode
146  */
147 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
148 {
149         struct pt_regs *old_regs = set_irq_regs(regs);
150
151         inc_irq_stat(hyperv_stimer0_count);
152         if (hv_stimer0_handler)
153                 hv_stimer0_handler();
154         add_interrupt_randomness(HYPERV_STIMER0_VECTOR);
155         apic_eoi();
156
157         set_irq_regs(old_regs);
158 }
159
160 /* For x86/x64, override weak placeholders in hyperv_timer.c */
161 void hv_setup_stimer0_handler(void (*handler)(void))
162 {
163         hv_stimer0_handler = handler;
164 }
165
166 void hv_remove_stimer0_handler(void)
167 {
168         /* We have no way to deallocate the interrupt gate */
169         hv_stimer0_handler = NULL;
170 }
171
172 void hv_setup_kexec_handler(void (*handler)(void))
173 {
174         hv_kexec_handler = handler;
175 }
176
177 void hv_remove_kexec_handler(void)
178 {
179         hv_kexec_handler = NULL;
180 }
181
182 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
183 {
184         hv_crash_handler = handler;
185 }
186
187 void hv_remove_crash_handler(void)
188 {
189         hv_crash_handler = NULL;
190 }
191
192 #ifdef CONFIG_KEXEC_CORE
193 static void hv_machine_shutdown(void)
194 {
195         if (kexec_in_progress && hv_kexec_handler)
196                 hv_kexec_handler();
197
198         /*
199          * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
200          * corrupts the old VP Assist Pages and can crash the kexec kernel.
201          */
202         if (kexec_in_progress && hyperv_init_cpuhp > 0)
203                 cpuhp_remove_state(hyperv_init_cpuhp);
204
205         /* The function calls stop_other_cpus(). */
206         native_machine_shutdown();
207
208         /* Disable the hypercall page when there is only 1 active CPU. */
209         if (kexec_in_progress)
210                 hyperv_cleanup();
211 }
212 #endif /* CONFIG_KEXEC_CORE */
213
214 #ifdef CONFIG_CRASH_DUMP
215 static void hv_machine_crash_shutdown(struct pt_regs *regs)
216 {
217         if (hv_crash_handler)
218                 hv_crash_handler(regs);
219
220         /* The function calls crash_smp_send_stop(). */
221         native_machine_crash_shutdown(regs);
222
223         /* Disable the hypercall page when there is only 1 active CPU. */
224         hyperv_cleanup();
225 }
226 #endif /* CONFIG_CRASH_DUMP */
227 #endif /* CONFIG_HYPERV */
228
229 static uint32_t  __init ms_hyperv_platform(void)
230 {
231         u32 eax;
232         u32 hyp_signature[3];
233
234         if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
235                 return 0;
236
237         cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
238               &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
239
240         if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX ||
241             memcmp("Microsoft Hv", hyp_signature, 12))
242                 return 0;
243
244         /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */
245         eax = cpuid_eax(HYPERV_CPUID_FEATURES);
246         if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) {
247                 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n");
248                 return 0;
249         }
250         if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) {
251                 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n");
252                 return 0;
253         }
254
255         return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
256 }
257
258 #ifdef CONFIG_X86_LOCAL_APIC
259 /*
260  * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
261  * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle
262  * unknown NMI on the first CPU which gets it.
263  */
264 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
265 {
266         static atomic_t nmi_cpu = ATOMIC_INIT(-1);
267         unsigned int old_cpu, this_cpu;
268
269         if (!unknown_nmi_panic)
270                 return NMI_DONE;
271
272         old_cpu = -1;
273         this_cpu = raw_smp_processor_id();
274         if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
275                 return NMI_HANDLED;
276
277         return NMI_DONE;
278 }
279 #endif
280
281 static unsigned long hv_get_tsc_khz(void)
282 {
283         unsigned long freq;
284
285         rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
286
287         return freq / 1000;
288 }
289
290 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
291 static void __init hv_smp_prepare_boot_cpu(void)
292 {
293         native_smp_prepare_boot_cpu();
294 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
295         hv_init_spinlocks();
296 #endif
297 }
298
299 static void __init hv_smp_prepare_cpus(unsigned int max_cpus)
300 {
301 #ifdef CONFIG_X86_64
302         int i;
303         int ret;
304 #endif
305
306         native_smp_prepare_cpus(max_cpus);
307
308         /*
309          *  Override wakeup_secondary_cpu_64 callback for SEV-SNP
310          *  enlightened guest.
311          */
312         if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
313                 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap;
314                 return;
315         }
316
317 #ifdef CONFIG_X86_64
318         for_each_present_cpu(i) {
319                 if (i == 0)
320                         continue;
321                 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
322                 BUG_ON(ret);
323         }
324
325         for_each_present_cpu(i) {
326                 if (i == 0)
327                         continue;
328                 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i);
329                 BUG_ON(ret);
330         }
331 #endif
332 }
333 #endif
334
335 /*
336  * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the
337  * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0
338  * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns
339  * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a
340  * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and
341  * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs
342  * from the array and hence doesn't create the necessary irq description info.
343  *
344  * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here,
345  * except don't change 'legacy_pic', which keeps its default value
346  * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero
347  * nr_legacy_irqs() and eventually serial console interrupts works properly.
348  */
349 static void __init reduced_hw_init(void)
350 {
351         x86_init.timers.timer_init      = x86_init_noop;
352         x86_init.irqs.pre_vector_init   = x86_init_noop;
353 }
354
355 static void __init ms_hyperv_init_platform(void)
356 {
357         int hv_max_functions_eax;
358         int hv_host_info_eax;
359         int hv_host_info_ebx;
360         int hv_host_info_ecx;
361         int hv_host_info_edx;
362
363 #ifdef CONFIG_PARAVIRT
364         pv_info.name = "Hyper-V";
365 #endif
366
367         /*
368          * Extract the features and hints
369          */
370         ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
371         ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
372         ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
373         ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
374
375         hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
376
377         pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",
378                 ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints,
379                 ms_hyperv.misc_features);
380
381         ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
382         ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
383
384         pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
385                  ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
386
387         /*
388          * Check CPU management privilege.
389          *
390          * To mirror what Windows does we should extract CPU management
391          * features and use the ReservedIdentityBit to detect if Linux is the
392          * root partition. But that requires negotiating CPU management
393          * interface (a process to be finalized). For now, use the privilege
394          * flag as the indicator for running as root.
395          *
396          * Hyper-V should never specify running as root and as a Confidential
397          * VM. But to protect against a compromised/malicious Hyper-V trying
398          * to exploit root behavior to expose Confidential VM memory, ignore
399          * the root partition setting if also a Confidential VM.
400          */
401         if ((ms_hyperv.priv_high & HV_CPU_MANAGEMENT) &&
402             !(ms_hyperv.priv_high & HV_ISOLATION)) {
403                 hv_root_partition = true;
404                 pr_info("Hyper-V: running as root partition\n");
405         }
406
407         if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
408                 hv_nested = true;
409                 pr_info("Hyper-V: running on a nested hypervisor\n");
410         }
411
412         /*
413          * Extract host information.
414          */
415         if (hv_max_functions_eax >= HYPERV_CPUID_VERSION) {
416                 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
417                 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
418                 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
419                 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
420
421                 pr_info("Hyper-V: Host Build %d.%d.%d.%d-%d-%d\n",
422                         hv_host_info_ebx >> 16, hv_host_info_ebx & 0xFFFF,
423                         hv_host_info_eax, hv_host_info_edx & 0xFFFFFF,
424                         hv_host_info_ecx, hv_host_info_edx >> 24);
425         }
426
427         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
428             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
429                 x86_platform.calibrate_tsc = hv_get_tsc_khz;
430                 x86_platform.calibrate_cpu = hv_get_tsc_khz;
431         }
432
433         if (ms_hyperv.priv_high & HV_ISOLATION) {
434                 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
435                 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
436
437                 if (ms_hyperv.shared_gpa_boundary_active)
438                         ms_hyperv.shared_gpa_boundary =
439                                 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits);
440
441                 hyperv_paravisor_present = !!ms_hyperv.paravisor_present;
442
443                 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
444                         ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
445
446
447                 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) {
448                         static_branch_enable(&isolation_type_snp);
449                 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) {
450                         static_branch_enable(&isolation_type_tdx);
451
452                         /* A TDX VM must use x2APIC and doesn't use lazy EOI. */
453                         ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED;
454
455                         if (!ms_hyperv.paravisor_present) {
456                                 /* To be supported: more work is required.  */
457                                 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE;
458
459                                 /* HV_REGISTER_CRASH_CTL is unsupported. */
460                                 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
461
462                                 /* Don't trust Hyper-V's TLB-flushing hypercalls. */
463                                 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
464
465                                 x86_init.acpi.reduced_hw_early_init = reduced_hw_init;
466                         }
467                 }
468         }
469
470         if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
471                 ms_hyperv.nested_features =
472                         cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
473                 pr_info("Hyper-V: Nested features: 0x%x\n",
474                         ms_hyperv.nested_features);
475         }
476
477 #ifdef CONFIG_X86_LOCAL_APIC
478         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
479             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
480                 /*
481                  * Get the APIC frequency.
482                  */
483                 u64     hv_lapic_frequency;
484
485                 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
486                 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
487                 lapic_timer_period = hv_lapic_frequency;
488                 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
489                         lapic_timer_period);
490         }
491
492         register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
493                              "hv_nmi_unknown");
494 #endif
495
496 #ifdef CONFIG_X86_IO_APIC
497         no_timer_check = 1;
498 #endif
499
500 #if IS_ENABLED(CONFIG_HYPERV)
501 #if defined(CONFIG_KEXEC_CORE)
502         machine_ops.shutdown = hv_machine_shutdown;
503 #endif
504 #if defined(CONFIG_CRASH_DUMP)
505         machine_ops.crash_shutdown = hv_machine_crash_shutdown;
506 #endif
507 #endif
508         if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
509                 /*
510                  * Writing to synthetic MSR 0x40000118 updates/changes the
511                  * guest visible CPUIDs. Setting bit 0 of this MSR  enables
512                  * guests to report invariant TSC feature through CPUID
513                  * instruction, CPUID 0x800000007/EDX, bit 8. See code in
514                  * early_init_intel() where this bit is examined. The
515                  * setting of this MSR bit should happen before init_intel()
516                  * is called.
517                  */
518                 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);
519                 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
520         }
521
522         /*
523          * Generation 2 instances don't support reading the NMI status from
524          * 0x61 port.
525          */
526         if (efi_enabled(EFI_BOOT))
527                 x86_platform.get_nmi_reason = hv_get_nmi_reason;
528
529         /*
530          * Hyper-V VMs have a PIT emulation quirk such that zeroing the
531          * counter register during PIT shutdown restarts the PIT. So it
532          * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
533          * to false tells pit_shutdown() not to zero the counter so that
534          * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
535          * and setting this value has no effect.
536          */
537         i8253_clear_counter_on_shutdown = false;
538
539 #if IS_ENABLED(CONFIG_HYPERV)
540         if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) ||
541             ms_hyperv.paravisor_present)
542                 hv_vtom_init();
543         /*
544          * Setup the hook to get control post apic initialization.
545          */
546         x86_platform.apic_post_init = hyperv_init;
547         hyperv_setup_mmu_ops();
548
549         /* Install system interrupt handler for hypervisor callback */
550         sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback);
551
552         /* Install system interrupt handler for reenlightenment notifications */
553         if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
554                 sysvec_install(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment);
555         }
556
557         /* Install system interrupt handler for stimer0 */
558         if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
559                 sysvec_install(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0);
560         }
561
562 # ifdef CONFIG_SMP
563         smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
564         if (hv_root_partition ||
565             (!ms_hyperv.paravisor_present && hv_isolation_type_snp()))
566                 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus;
567 # endif
568
569         /*
570          * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
571          * set x2apic destination mode to physical mode when x2apic is available
572          * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
573          * have 8-bit APIC id.
574          */
575 # ifdef CONFIG_X86_X2APIC
576         if (x2apic_supported())
577                 x2apic_phys = 1;
578 # endif
579
580         /* Register Hyper-V specific clocksource */
581         hv_init_clocksource();
582         hv_vtl_init_platform();
583 #endif
584         /*
585          * TSC should be marked as unstable only after Hyper-V
586          * clocksource has been initialized. This ensures that the
587          * stability of the sched_clock is not altered.
588          */
589         if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
590                 mark_tsc_unstable("running on Hyper-V");
591
592         hardlockup_detector_disable();
593 }
594
595 static bool __init ms_hyperv_x2apic_available(void)
596 {
597         return x2apic_supported();
598 }
599
600 /*
601  * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
602  * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
603  * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
604  *
605  * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
606  * (logically) generates MSIs directly to the system APIC irq domain.
607  * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
608  * pci-hyperv host bridge.
609  *
610  * Note: for a Hyper-V root partition, this will always return false.
611  * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by
612  * default, they are implemented as intercepts by the Windows Hyper-V stack.
613  * Even a nested root partition (L2 root) will not get them because the
614  * nested (L1) hypervisor filters them out.
615  */
616 static bool __init ms_hyperv_msi_ext_dest_id(void)
617 {
618         u32 eax;
619
620         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
621         if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
622                 return false;
623
624         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
625         return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
626 }
627
628 #ifdef CONFIG_AMD_MEM_ENCRYPT
629 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs)
630 {
631         /* RAX and CPL are already in the GHCB */
632         ghcb_set_rcx(ghcb, regs->cx);
633         ghcb_set_rdx(ghcb, regs->dx);
634         ghcb_set_r8(ghcb, regs->r8);
635 }
636
637 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs)
638 {
639         /* No checking of the return state needed */
640         return true;
641 }
642 #endif
643
644 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
645         .name                   = "Microsoft Hyper-V",
646         .detect                 = ms_hyperv_platform,
647         .type                   = X86_HYPER_MS_HYPERV,
648         .init.x2apic_available  = ms_hyperv_x2apic_available,
649         .init.msi_ext_dest_id   = ms_hyperv_msi_ext_dest_id,
650         .init.init_platform     = ms_hyperv_init_platform,
651 #ifdef CONFIG_AMD_MEM_ENCRYPT
652         .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare,
653         .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish,
654 #endif
655 };