arch/x86/kernel/cpu/mshyperv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * HyperV  Detection code.
   4  *
   5  * Copyright (C) 2010, Novell, Inc.
   6  * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/time.h>
  11 #include <linux/clocksource.h>
  12 #include <linux/init.h>
  13 #include <linux/export.h>
  14 #include <linux/hardirq.h>
  15 #include <linux/efi.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/irq.h>
  18 #include <linux/kexec.h>
  19 #include <linux/i8253.h>
  20 #include <linux/random.h>
  21 #include <asm/processor.h>
  22 #include <asm/hypervisor.h>
  23 #include <asm/hyperv-tlfs.h>
  24 #include <asm/mshyperv.h>
  25 #include <asm/desc.h>
  26 #include <asm/idtentry.h>
  27 #include <asm/irq_regs.h>
  28 #include <asm/i8259.h>
  29 #include <asm/apic.h>
  30 #include <asm/timer.h>
  31 #include <asm/reboot.h>
  32 #include <asm/nmi.h>
  33 #include <clocksource/hyperv_timer.h>
  34 #include <asm/numa.h>
  35 #include <asm/svm.h>
  36
  37 /* Is Linux running as the root partition? */
  38 bool hv_root_partition;
  39 /* Is Linux running on nested Microsoft Hypervisor */
  40 bool hv_nested;
  41 struct ms_hyperv_info ms_hyperv;
  42
  43 /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */
  44 bool hyperv_paravisor_present __ro_after_init;
  45 EXPORT_SYMBOL_GPL(hyperv_paravisor_present);
  46
  47 #if IS_ENABLED(CONFIG_HYPERV)
  48 static inline unsigned int hv_get_nested_msr(unsigned int reg)
  49 {
  50         if (hv_is_sint_msr(reg))
  51                 return reg - HV_X64_MSR_SINT0 + HV_X64_MSR_NESTED_SINT0;
  52
  53         switch (reg) {
  54         case HV_X64_MSR_SIMP:
  55                 return HV_X64_MSR_NESTED_SIMP;
  56         case HV_X64_MSR_SIEFP:
  57                 return HV_X64_MSR_NESTED_SIEFP;
  58         case HV_X64_MSR_SVERSION:
  59                 return HV_X64_MSR_NESTED_SVERSION;
  60         case HV_X64_MSR_SCONTROL:
  61                 return HV_X64_MSR_NESTED_SCONTROL;
  62         case HV_X64_MSR_EOM:
  63                 return HV_X64_MSR_NESTED_EOM;
  64         default:
  65                 return reg;
  66         }
  67 }
  68
  69 u64 hv_get_non_nested_msr(unsigned int reg)
  70 {
  71         u64 value;
  72
  73         if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present)
  74                 hv_ivm_msr_read(reg, &value);
  75         else
  76                 rdmsrl(reg, value);
  77         return value;
  78 }
  79 EXPORT_SYMBOL_GPL(hv_get_non_nested_msr);
  80
  81 void hv_set_non_nested_msr(unsigned int reg, u64 value)
  82 {
  83         if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) {
  84                 hv_ivm_msr_write(reg, value);
  85
  86                 /* Write proxy bit via wrmsl instruction */
  87                 if (hv_is_sint_msr(reg))
  88                         wrmsrl(reg, value | 1 << 20);
  89         } else {
  90                 wrmsrl(reg, value);
  91         }
  92 }
  93 EXPORT_SYMBOL_GPL(hv_set_non_nested_msr);
  94
  95 u64 hv_get_msr(unsigned int reg)
  96 {
  97         if (hv_nested)
  98                 reg = hv_get_nested_msr(reg);
  99
 100         return hv_get_non_nested_msr(reg);
 101 }
 102 EXPORT_SYMBOL_GPL(hv_get_msr);
 103
 104 void hv_set_msr(unsigned int reg, u64 value)
 105 {
 106         if (hv_nested)
 107                 reg = hv_get_nested_msr(reg);
 108
 109         hv_set_non_nested_msr(reg, value);
 110 }
 111 EXPORT_SYMBOL_GPL(hv_set_msr);
 112
 113 static void (*vmbus_handler)(void);
 114 static void (*hv_stimer0_handler)(void);
 115 static void (*hv_kexec_handler)(void);
 116 static void (*hv_crash_handler)(struct pt_regs *regs);
 117
 118 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
 119 {
 120         struct pt_regs *old_regs = set_irq_regs(regs);
 121
 122         inc_irq_stat(irq_hv_callback_count);
 123         if (vmbus_handler)
 124                 vmbus_handler();
 125
 126         if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
 127                 apic_eoi();
 128
 129         set_irq_regs(old_regs);
 130 }
 131
 132 void hv_setup_vmbus_handler(void (*handler)(void))
 133 {
 134         vmbus_handler = handler;
 135 }
 136
 137 void hv_remove_vmbus_handler(void)
 138 {
 139         /* We have no way to deallocate the interrupt gate */
 140         vmbus_handler = NULL;
 141 }
 142
 143 /*
 144  * Routines to do per-architecture handling of stimer0
 145  * interrupts when in Direct Mode
 146  */
 147 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
 148 {
 149         struct pt_regs *old_regs = set_irq_regs(regs);
 150
 151         inc_irq_stat(hyperv_stimer0_count);
 152         if (hv_stimer0_handler)
 153                 hv_stimer0_handler();
 154         add_interrupt_randomness(HYPERV_STIMER0_VECTOR);
 155         apic_eoi();
 156
 157         set_irq_regs(old_regs);
 158 }
 159
 160 /* For x86/x64, override weak placeholders in hyperv_timer.c */
 161 void hv_setup_stimer0_handler(void (*handler)(void))
 162 {
 163         hv_stimer0_handler = handler;
 164 }
 165
 166 void hv_remove_stimer0_handler(void)
 167 {
 168         /* We have no way to deallocate the interrupt gate */
 169         hv_stimer0_handler = NULL;
 170 }
 171
 172 void hv_setup_kexec_handler(void (*handler)(void))
 173 {
 174         hv_kexec_handler = handler;
 175 }
 176
 177 void hv_remove_kexec_handler(void)
 178 {
 179         hv_kexec_handler = NULL;
 180 }
 181
 182 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
 183 {
 184         hv_crash_handler = handler;
 185 }
 186
 187 void hv_remove_crash_handler(void)
 188 {
 189         hv_crash_handler = NULL;
 190 }
 191
 192 #ifdef CONFIG_KEXEC_CORE
 193 static void hv_machine_shutdown(void)
 194 {
 195         if (kexec_in_progress && hv_kexec_handler)
 196                 hv_kexec_handler();
 197
 198         /*
 199          * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
 200          * corrupts the old VP Assist Pages and can crash the kexec kernel.
 201          */
 202         if (kexec_in_progress && hyperv_init_cpuhp > 0)
 203                 cpuhp_remove_state(hyperv_init_cpuhp);
 204
 205         /* The function calls stop_other_cpus(). */
 206         native_machine_shutdown();
 207
 208         /* Disable the hypercall page when there is only 1 active CPU. */
 209         if (kexec_in_progress)
 210                 hyperv_cleanup();
 211 }
 212
 213 static void hv_machine_crash_shutdown(struct pt_regs *regs)
 214 {
 215         if (hv_crash_handler)
 216                 hv_crash_handler(regs);
 217
 218         /* The function calls crash_smp_send_stop(). */
 219         native_machine_crash_shutdown(regs);
 220
 221         /* Disable the hypercall page when there is only 1 active CPU. */
 222         hyperv_cleanup();
 223 }
 224 #endif /* CONFIG_KEXEC_CORE */
 225 #endif /* CONFIG_HYPERV */
 226
 227 static uint32_t  __init ms_hyperv_platform(void)
 228 {
 229         u32 eax;
 230         u32 hyp_signature[3];
 231
 232         if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
 233                 return 0;
 234
 235         cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
 236               &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
 237
 238         if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX ||
 239             memcmp("Microsoft Hv", hyp_signature, 12))
 240                 return 0;
 241
 242         /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */
 243         eax = cpuid_eax(HYPERV_CPUID_FEATURES);
 244         if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) {
 245                 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n");
 246                 return 0;
 247         }
 248         if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) {
 249                 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n");
 250                 return 0;
 251         }
 252
 253         return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
 254 }
 255
 256 #ifdef CONFIG_X86_LOCAL_APIC
 257 /*
 258  * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
 259  * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle
 260  * unknown NMI on the first CPU which gets it.
 261  */
 262 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
 263 {
 264         static atomic_t nmi_cpu = ATOMIC_INIT(-1);
 265         unsigned int old_cpu, this_cpu;
 266
 267         if (!unknown_nmi_panic)
 268                 return NMI_DONE;
 269
 270         old_cpu = -1;
 271         this_cpu = raw_smp_processor_id();
 272         if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
 273                 return NMI_HANDLED;
 274
 275         return NMI_DONE;
 276 }
 277 #endif
 278
 279 static unsigned long hv_get_tsc_khz(void)
 280 {
 281         unsigned long freq;
 282
 283         rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
 284
 285         return freq / 1000;
 286 }
 287
 288 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
 289 static void __init hv_smp_prepare_boot_cpu(void)
 290 {
 291         native_smp_prepare_boot_cpu();
 292 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 293         hv_init_spinlocks();
 294 #endif
 295 }
 296
 297 static void __init hv_smp_prepare_cpus(unsigned int max_cpus)
 298 {
 299 #ifdef CONFIG_X86_64
 300         int i;
 301         int ret;
 302 #endif
 303
 304         native_smp_prepare_cpus(max_cpus);
 305
 306         /*
 307          *  Override wakeup_secondary_cpu_64 callback for SEV-SNP
 308          *  enlightened guest.
 309          */
 310         if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
 311                 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap;
 312                 return;
 313         }
 314
 315 #ifdef CONFIG_X86_64
 316         for_each_present_cpu(i) {
 317                 if (i == 0)
 318                         continue;
 319                 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
 320                 BUG_ON(ret);
 321         }
 322
 323         for_each_present_cpu(i) {
 324                 if (i == 0)
 325                         continue;
 326                 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i);
 327                 BUG_ON(ret);
 328         }
 329 #endif
 330 }
 331 #endif
 332
 333 /*
 334  * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the
 335  * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0
 336  * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns
 337  * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a
 338  * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and
 339  * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs
 340  * from the array and hence doesn't create the necessary irq description info.
 341  *
 342  * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here,
 343  * except don't change 'legacy_pic', which keeps its default value
 344  * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero
 345  * nr_legacy_irqs() and eventually serial console interrupts works properly.
 346  */
 347 static void __init reduced_hw_init(void)
 348 {
 349         x86_init.timers.timer_init      = x86_init_noop;
 350         x86_init.irqs.pre_vector_init   = x86_init_noop;
 351 }
 352
 353 int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
 354 {
 355         unsigned int hv_max_functions;
 356
 357         hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
 358         if (hv_max_functions < HYPERV_CPUID_VERSION) {
 359                 pr_err("%s: Could not detect Hyper-V version\n", __func__);
 360                 return -ENODEV;
 361         }
 362
 363         cpuid(HYPERV_CPUID_VERSION, &info->eax, &info->ebx, &info->ecx, &info->edx);
 364
 365         return 0;
 366 }
 367
 368 static void __init ms_hyperv_init_platform(void)
 369 {
 370         int hv_max_functions_eax;
 371
 372 #ifdef CONFIG_PARAVIRT
 373         pv_info.name = "Hyper-V";
 374 #endif
 375
 376         /*
 377          * Extract the features and hints
 378          */
 379         ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
 380         ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
 381         ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
 382         ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
 383
 384         hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
 385
 386         pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",
 387                 ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints,
 388                 ms_hyperv.misc_features);
 389
 390         ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
 391         ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
 392
 393         pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
 394                  ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
 395
 396         /*
 397          * Check CPU management privilege.
 398          *
 399          * To mirror what Windows does we should extract CPU management
 400          * features and use the ReservedIdentityBit to detect if Linux is the
 401          * root partition. But that requires negotiating CPU management
 402          * interface (a process to be finalized). For now, use the privilege
 403          * flag as the indicator for running as root.
 404          *
 405          * Hyper-V should never specify running as root and as a Confidential
 406          * VM. But to protect against a compromised/malicious Hyper-V trying
 407          * to exploit root behavior to expose Confidential VM memory, ignore
 408          * the root partition setting if also a Confidential VM.
 409          */
 410         if ((ms_hyperv.priv_high & HV_CPU_MANAGEMENT) &&
 411             !(ms_hyperv.priv_high & HV_ISOLATION)) {
 412                 hv_root_partition = true;
 413                 pr_info("Hyper-V: running as root partition\n");
 414         }
 415
 416         if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
 417                 hv_nested = true;
 418                 pr_info("Hyper-V: running on a nested hypervisor\n");
 419         }
 420
 421         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
 422             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
 423                 x86_platform.calibrate_tsc = hv_get_tsc_khz;
 424                 x86_platform.calibrate_cpu = hv_get_tsc_khz;
 425         }
 426
 427         if (ms_hyperv.priv_high & HV_ISOLATION) {
 428                 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
 429                 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
 430
 431                 if (ms_hyperv.shared_gpa_boundary_active)
 432                         ms_hyperv.shared_gpa_boundary =
 433                                 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits);
 434
 435                 hyperv_paravisor_present = !!ms_hyperv.paravisor_present;
 436
 437                 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
 438                         ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
 439
 440
 441                 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) {
 442                         static_branch_enable(&isolation_type_snp);
 443                 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) {
 444                         static_branch_enable(&isolation_type_tdx);
 445
 446                         /* A TDX VM must use x2APIC and doesn't use lazy EOI. */
 447                         ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED;
 448
 449                         if (!ms_hyperv.paravisor_present) {
 450                                 /* To be supported: more work is required.  */
 451                                 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE;
 452
 453                                 /* HV_MSR_CRASH_CTL is unsupported. */
 454                                 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
 455
 456                                 /* Don't trust Hyper-V's TLB-flushing hypercalls. */
 457                                 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
 458
 459                                 x86_init.acpi.reduced_hw_early_init = reduced_hw_init;
 460                         }
 461                 }
 462         }
 463
 464         if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
 465                 ms_hyperv.nested_features =
 466                         cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
 467                 pr_info("Hyper-V: Nested features: 0x%x\n",
 468                         ms_hyperv.nested_features);
 469         }
 470
 471 #ifdef CONFIG_X86_LOCAL_APIC
 472         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
 473             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
 474                 /*
 475                  * Get the APIC frequency.
 476                  */
 477                 u64     hv_lapic_frequency;
 478
 479                 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
 480                 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
 481                 lapic_timer_period = hv_lapic_frequency;
 482                 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
 483                         lapic_timer_period);
 484         }
 485
 486         register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
 487                              "hv_nmi_unknown");
 488 #endif
 489
 490 #ifdef CONFIG_X86_IO_APIC
 491         no_timer_check = 1;
 492 #endif
 493
 494 #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
 495         machine_ops.shutdown = hv_machine_shutdown;
 496         machine_ops.crash_shutdown = hv_machine_crash_shutdown;
 497 #endif
 498         if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
 499                 /*
 500                  * Writing to synthetic MSR 0x40000118 updates/changes the
 501                  * guest visible CPUIDs. Setting bit 0 of this MSR  enables
 502                  * guests to report invariant TSC feature through CPUID
 503                  * instruction, CPUID 0x800000007/EDX, bit 8. See code in
 504                  * early_init_intel() where this bit is examined. The
 505                  * setting of this MSR bit should happen before init_intel()
 506                  * is called.
 507                  */
 508                 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);
 509                 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
 510         }
 511
 512         /*
 513          * Generation 2 instances don't support reading the NMI status from
 514          * 0x61 port.
 515          */
 516         if (efi_enabled(EFI_BOOT))
 517                 x86_platform.get_nmi_reason = hv_get_nmi_reason;
 518
 519         /*
 520          * Hyper-V VMs have a PIT emulation quirk such that zeroing the
 521          * counter register during PIT shutdown restarts the PIT. So it
 522          * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
 523          * to false tells pit_shutdown() not to zero the counter so that
 524          * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
 525          * and setting this value has no effect.
 526          */
 527         i8253_clear_counter_on_shutdown = false;
 528
 529 #if IS_ENABLED(CONFIG_HYPERV)
 530         if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) ||
 531             ms_hyperv.paravisor_present)
 532                 hv_vtom_init();
 533         /*
 534          * Setup the hook to get control post apic initialization.
 535          */
 536         x86_platform.apic_post_init = hyperv_init;
 537         hyperv_setup_mmu_ops();
 538         /* Setup the IDT for hypervisor callback */
 539         alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback);
 540
 541         /* Setup the IDT for reenlightenment notifications */
 542         if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
 543                 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
 544                                 asm_sysvec_hyperv_reenlightenment);
 545         }
 546
 547         /* Setup the IDT for stimer0 */
 548         if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
 549                 alloc_intr_gate(HYPERV_STIMER0_VECTOR,
 550                                 asm_sysvec_hyperv_stimer0);
 551         }
 552
 553 # ifdef CONFIG_SMP
 554         smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
 555         if (hv_root_partition ||
 556             (!ms_hyperv.paravisor_present && hv_isolation_type_snp()))
 557                 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus;
 558 # endif
 559
 560         /*
 561          * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
 562          * set x2apic destination mode to physical mode when x2apic is available
 563          * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
 564          * have 8-bit APIC id.
 565          */
 566 # ifdef CONFIG_X86_X2APIC
 567         if (x2apic_supported())
 568                 x2apic_phys = 1;
 569 # endif
 570
 571         /* Register Hyper-V specific clocksource */
 572         hv_init_clocksource();
 573         hv_vtl_init_platform();
 574 #endif
 575         /*
 576          * TSC should be marked as unstable only after Hyper-V
 577          * clocksource has been initialized. This ensures that the
 578          * stability of the sched_clock is not altered.
 579          */
 580         if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
 581                 mark_tsc_unstable("running on Hyper-V");
 582
 583         hardlockup_detector_disable();
 584 }
 585
 586 static bool __init ms_hyperv_x2apic_available(void)
 587 {
 588         return x2apic_supported();
 589 }
 590
 591 /*
 592  * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
 593  * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
 594  * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
 595  *
 596  * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
 597  * (logically) generates MSIs directly to the system APIC irq domain.
 598  * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
 599  * pci-hyperv host bridge.
 600  *
 601  * Note: for a Hyper-V root partition, this will always return false.
 602  * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by
 603  * default, they are implemented as intercepts by the Windows Hyper-V stack.
 604  * Even a nested root partition (L2 root) will not get them because the
 605  * nested (L1) hypervisor filters them out.
 606  */
 607 static bool __init ms_hyperv_msi_ext_dest_id(void)
 608 {
 609         u32 eax;
 610
 611         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
 612         if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
 613                 return false;
 614
 615         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
 616         return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
 617 }
 618
 619 #ifdef CONFIG_AMD_MEM_ENCRYPT
 620 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs)
 621 {
 622         /* RAX and CPL are already in the GHCB */
 623         ghcb_set_rcx(ghcb, regs->cx);
 624         ghcb_set_rdx(ghcb, regs->dx);
 625         ghcb_set_r8(ghcb, regs->r8);
 626 }
 627
 628 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs)
 629 {
 630         /* No checking of the return state needed */
 631         return true;
 632 }
 633 #endif
 634
 635 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
 636         .name                   = "Microsoft Hyper-V",
 637         .detect                 = ms_hyperv_platform,
 638         .type                   = X86_HYPER_MS_HYPERV,
 639         .init.x2apic_available  = ms_hyperv_x2apic_available,
 640         .init.msi_ext_dest_id   = ms_hyperv_msi_ext_dest_id,
 641         .init.init_platform     = ms_hyperv_init_platform,
 642 #ifdef CONFIG_AMD_MEM_ENCRYPT
 643         .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare,
 644         .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish,
 645 #endif
 646 };