1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
7 #include <linux/bitfield.h>
8 #include <linux/coresight.h>
9 #include <linux/coresight-pmu.h>
10 #include <linux/cpumask.h>
11 #include <linux/device.h>
12 #include <linux/list.h>
14 #include <linux/init.h>
15 #include <linux/perf_event.h>
16 #include <linux/percpu-defs.h>
17 #include <linux/slab.h>
18 #include <linux/stringhash.h>
19 #include <linux/types.h>
20 #include <linux/workqueue.h>
22 #include "coresight-config.h"
23 #include "coresight-etm-perf.h"
24 #include "coresight-priv.h"
25 #include "coresight-syscfg.h"
26 #include "coresight-trace-id.h"
28 static struct pmu etm_pmu;
29 static bool etm_perf_up;
32 * An ETM context for a running event includes the perf aux handle
33 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
34 * the trace path and the sink configuration. The event data is accessible
35 * via perf_get_aux(handle). However, a sink could "end" a perf output
36 * handle via the IRQ handler. And if the "sink" encounters a failure
37 * to "begin" another session (e.g due to lack of space in the buffer),
38 * the handle will be cleared. Thus, the event_data may not be accessible
39 * from the handle when we get to the etm_event_stop(), which is required
40 * for stopping the trace path. The event_data is guaranteed to stay alive
41 * until "free_aux()", which cannot happen as long as the event is active on
42 * the ETM. Thus the event_data for the session must be part of the ETM context
43 * to make sure we can disable the trace path.
46 struct perf_output_handle handle;
47 struct etm_event_data *event_data;
50 static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
51 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
54 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
55 * now take them as general formats and apply on all ETMs.
57 PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
58 PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
59 /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
60 PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
61 /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
62 PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
63 PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
64 PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
65 /* preset - if sink ID is used as a configuration selector */
66 PMU_FORMAT_ATTR(preset, "config:0-3");
67 /* Sink ID - same for all ETMs */
68 PMU_FORMAT_ATTR(sinkid, "config2:0-31");
69 /* config ID - set if a system configuration is selected */
70 PMU_FORMAT_ATTR(configid, "config2:32-63");
71 PMU_FORMAT_ATTR(cc_threshold, "config3:0-11");
75 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
76 * when the kernel is running at EL1; when the kernel is at EL2,
77 * the PID is in CONTEXTIDR_EL2.
79 static ssize_t format_attr_contextid_show(struct device *dev,
80 struct device_attribute *attr,
83 int pid_fmt = ETM_OPT_CTXTID;
85 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
86 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
88 return sprintf(page, "config:%d\n", pid_fmt);
91 static struct device_attribute format_attr_contextid =
92 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
94 static struct attribute *etm_config_formats_attr[] = {
95 &format_attr_cycacc.attr,
96 &format_attr_contextid.attr,
97 &format_attr_contextid1.attr,
98 &format_attr_contextid2.attr,
99 &format_attr_timestamp.attr,
100 &format_attr_retstack.attr,
101 &format_attr_sinkid.attr,
102 &format_attr_preset.attr,
103 &format_attr_configid.attr,
104 &format_attr_branch_broadcast.attr,
105 &format_attr_cc_threshold.attr,
109 static const struct attribute_group etm_pmu_format_group = {
111 .attrs = etm_config_formats_attr,
114 static struct attribute *etm_config_sinks_attr[] = {
118 static const struct attribute_group etm_pmu_sinks_group = {
120 .attrs = etm_config_sinks_attr,
123 static struct attribute *etm_config_events_attr[] = {
127 static const struct attribute_group etm_pmu_events_group = {
129 .attrs = etm_config_events_attr,
132 static const struct attribute_group *etm_pmu_attr_groups[] = {
133 &etm_pmu_format_group,
134 &etm_pmu_sinks_group,
135 &etm_pmu_events_group,
139 static inline struct list_head **
140 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
142 return per_cpu_ptr(data->path, cpu);
145 static inline struct list_head *
146 etm_event_cpu_path(struct etm_event_data *data, int cpu)
148 return *etm_event_cpu_path_ptr(data, cpu);
151 static void etm_event_read(struct perf_event *event) {}
153 static int etm_addr_filters_alloc(struct perf_event *event)
155 struct etm_filters *filters;
156 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
158 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
163 memcpy(filters, event->parent->hw.addr_filters,
166 event->hw.addr_filters = filters;
171 static void etm_event_destroy(struct perf_event *event)
173 kfree(event->hw.addr_filters);
174 event->hw.addr_filters = NULL;
177 static int etm_event_init(struct perf_event *event)
181 if (event->attr.type != etm_pmu.type) {
186 ret = etm_addr_filters_alloc(event);
190 event->destroy = etm_event_destroy;
195 static void free_sink_buffer(struct etm_event_data *event_data)
198 cpumask_t *mask = &event_data->mask;
199 struct coresight_device *sink;
201 if (!event_data->snk_config)
204 if (WARN_ON(cpumask_empty(mask)))
207 cpu = cpumask_first(mask);
208 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
209 sink_ops(sink)->free_buffer(event_data->snk_config);
212 static void free_event_data(struct work_struct *work)
216 struct etm_event_data *event_data;
218 event_data = container_of(work, struct etm_event_data, work);
219 mask = &event_data->mask;
221 /* Free the sink buffers, if there are any */
222 free_sink_buffer(event_data);
224 /* clear any configuration we were using */
225 if (event_data->cfg_hash)
226 cscfg_deactivate_config(event_data->cfg_hash);
228 for_each_cpu(cpu, mask) {
229 struct list_head **ppath;
231 ppath = etm_event_cpu_path_ptr(event_data, cpu);
232 if (!(IS_ERR_OR_NULL(*ppath)))
233 coresight_release_path(*ppath);
235 coresight_trace_id_put_cpu_id(cpu);
238 /* mark perf event as done for trace id allocator */
239 coresight_trace_id_perf_stop();
241 free_percpu(event_data->path);
245 static void *alloc_event_data(int cpu)
248 struct etm_event_data *event_data;
250 /* First get memory for the session's data */
251 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
256 mask = &event_data->mask;
258 cpumask_set_cpu(cpu, mask);
260 cpumask_copy(mask, cpu_present_mask);
263 * Each CPU has a single path between source and destination. As such
264 * allocate an array using CPU numbers as indexes. That way a path
265 * for any CPU can easily be accessed at any given time. We proceed
266 * the same way for sessions involving a single CPU. The cost of
267 * unused memory when dealing with single CPU trace scenarios is small
268 * compared to the cost of searching through an optimized array.
270 event_data->path = alloc_percpu(struct list_head *);
272 if (!event_data->path) {
280 static void etm_free_aux(void *data)
282 struct etm_event_data *event_data = data;
284 schedule_work(&event_data->work);
288 * Check if two given sinks are compatible with each other,
289 * so that they can use the same sink buffers, when an event
292 static bool sinks_compatible(struct coresight_device *a,
293 struct coresight_device *b)
298 * If the sinks are of the same subtype and driven
299 * by the same driver, we can use the same buffer
302 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
303 (sink_ops(a) == sink_ops(b));
306 static void *etm_setup_aux(struct perf_event *event, void **pages,
307 int nr_pages, bool overwrite)
310 int cpu = event->cpu;
313 struct coresight_device *sink = NULL;
314 struct coresight_device *user_sink = NULL, *last_sink = NULL;
315 struct etm_event_data *event_data = NULL;
317 event_data = alloc_event_data(cpu);
320 INIT_WORK(&event_data->work, free_event_data);
322 /* First get the selected sink from user space. */
323 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
324 id = (u32)event->attr.config2;
325 sink = user_sink = coresight_get_sink_by_id(id);
328 /* tell the trace ID allocator that a perf event is starting up */
329 coresight_trace_id_perf_start();
331 /* check if user wants a coresight configuration selected */
332 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
334 if (cscfg_activate_config(cfg_hash))
336 event_data->cfg_hash = cfg_hash;
339 mask = &event_data->mask;
342 * Setup the path for each CPU in a trace session. We try to build
343 * trace path for each CPU in the mask. If we don't find an ETM
344 * for the CPU or fail to build a path, we clear the CPU from the
345 * mask and continue with the rest. If ever we try to trace on those
346 * CPUs, we can handle it and fail the session.
348 for_each_cpu(cpu, mask) {
349 struct list_head *path;
350 struct coresight_device *csdev;
352 csdev = per_cpu(csdev_src, cpu);
354 * If there is no ETM associated with this CPU clear it from
355 * the mask and continue with the rest. If ever we try to trace
356 * on this CPU, we handle it accordingly.
359 cpumask_clear_cpu(cpu, mask);
364 * No sink provided - look for a default sink for all the ETMs,
365 * where this event can be scheduled.
366 * We allocate the sink specific buffers only once for this
367 * event. If the ETMs have different default sink devices, we
368 * can only use a single "type" of sink as the event can carry
369 * only one sink specific buffer. Thus we have to make sure
370 * that the sinks are of the same type and driven by the same
371 * driver, as the one we allocate the buffer for. As such
372 * we choose the first sink and check if the remaining ETMs
373 * have a compatible default sink. We don't trace on a CPU
374 * if the sink is not compatible.
377 /* Find the default sink for this ETM */
378 sink = coresight_find_default_sink(csdev);
380 cpumask_clear_cpu(cpu, mask);
384 /* Check if this sink compatible with the last sink */
385 if (last_sink && !sinks_compatible(last_sink, sink)) {
386 cpumask_clear_cpu(cpu, mask);
393 * Building a path doesn't enable it, it simply builds a
394 * list of devices from source to sink that can be
395 * referenced later when the path is actually needed.
397 path = coresight_build_path(csdev, sink);
399 cpumask_clear_cpu(cpu, mask);
403 /* ensure we can allocate a trace ID for this CPU */
404 trace_id = coresight_trace_id_get_cpu_id(cpu);
405 if (!IS_VALID_CS_TRACE_ID(trace_id)) {
406 cpumask_clear_cpu(cpu, mask);
407 coresight_release_path(path);
411 *etm_event_cpu_path_ptr(event_data, cpu) = path;
414 /* no sink found for any CPU - cannot trace */
418 /* If we don't have any CPUs ready for tracing, abort */
419 cpu = cpumask_first(mask);
420 if (cpu >= nr_cpu_ids)
423 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
427 * Allocate the sink buffer for this session. All the sinks
428 * where this event can be scheduled are ensured to be of the
429 * same type. Thus the same sink configuration is used by the
432 event_data->snk_config =
433 sink_ops(sink)->alloc_buffer(sink, event, pages,
434 nr_pages, overwrite);
435 if (!event_data->snk_config)
442 etm_free_aux(event_data);
447 static void etm_event_start(struct perf_event *event, int flags)
449 int cpu = smp_processor_id();
450 struct etm_event_data *event_data;
451 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
452 struct perf_output_handle *handle = &ctxt->handle;
453 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
454 struct list_head *path;
460 /* Have we messed up our tracking ? */
461 if (WARN_ON(ctxt->event_data))
465 * Deal with the ring buffer API and get a handle on the
466 * session's information.
468 event_data = perf_aux_output_begin(handle, event);
473 * Check if this ETM is allowed to trace, as decided
474 * at etm_setup_aux(). This could be due to an unreachable
475 * sink from this ETM. We can't do much in this case if
476 * the sink was specified or hinted to the driver. For
477 * now, simply don't record anything on this ETM.
479 * As such we pretend that everything is fine, and let
480 * it continue without actually tracing. The event could
481 * continue tracing when it moves to a CPU where it is
482 * reachable to a sink.
484 if (!cpumask_test_cpu(cpu, &event_data->mask))
487 path = etm_event_cpu_path(event_data, cpu);
488 /* We need a sink, no need to continue without one */
489 sink = coresight_get_sink(path);
490 if (WARN_ON_ONCE(!sink))
493 /* Nothing will happen without a path */
494 if (coresight_enable_path(path, CS_MODE_PERF, handle))
497 /* Finally enable the tracer */
498 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
499 goto fail_disable_path;
502 * output cpu / trace ID in perf record, once for the lifetime
505 if (!cpumask_test_cpu(cpu, &event_data->aux_hwid_done)) {
506 cpumask_set_cpu(cpu, &event_data->aux_hwid_done);
507 hw_id = FIELD_PREP(CS_AUX_HW_ID_VERSION_MASK,
508 CS_AUX_HW_ID_CURR_VERSION);
509 hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK,
510 coresight_trace_id_read_cpu_id(cpu));
511 perf_report_aux_output_id(event, hw_id);
515 /* Tell the perf core the event is alive */
517 /* Save the event_data for this ETM */
518 ctxt->event_data = event_data;
522 coresight_disable_path(path);
525 * Check if the handle is still associated with the event,
526 * to handle cases where if the sink failed to start the
527 * trace and TRUNCATED the handle already.
529 if (READ_ONCE(handle->event)) {
530 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
531 perf_aux_output_end(handle, 0);
534 event->hw.state = PERF_HES_STOPPED;
538 static void etm_event_stop(struct perf_event *event, int mode)
540 int cpu = smp_processor_id();
542 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
543 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
544 struct perf_output_handle *handle = &ctxt->handle;
545 struct etm_event_data *event_data;
546 struct list_head *path;
549 * If we still have access to the event_data via handle,
550 * confirm that we haven't messed up the tracking.
553 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
556 event_data = ctxt->event_data;
557 /* Clear the event_data as this ETM is stopping the trace. */
558 ctxt->event_data = NULL;
560 if (event->hw.state == PERF_HES_STOPPED)
563 /* We must have a valid event_data for a running event */
564 if (WARN_ON(!event_data))
568 * Check if this ETM was allowed to trace, as decided at
569 * etm_setup_aux(). If it wasn't allowed to trace, then
570 * nothing needs to be torn down other than outputting a
573 if (handle->event && (mode & PERF_EF_UPDATE) &&
574 !cpumask_test_cpu(cpu, &event_data->mask)) {
575 event->hw.state = PERF_HES_STOPPED;
576 perf_aux_output_end(handle, 0);
583 path = etm_event_cpu_path(event_data, cpu);
587 sink = coresight_get_sink(path);
592 coresight_disable_source(csdev, event);
595 event->hw.state = PERF_HES_STOPPED;
598 * If the handle is not bound to an event anymore
599 * (e.g, the sink driver was unable to restart the
600 * handle due to lack of buffer space), we don't
601 * have to do anything here.
603 if (handle->event && (mode & PERF_EF_UPDATE)) {
604 if (WARN_ON_ONCE(handle->event != event))
607 /* update trace information */
608 if (!sink_ops(sink)->update_buffer)
611 size = sink_ops(sink)->update_buffer(sink, handle,
612 event_data->snk_config);
614 * Make sure the handle is still valid as the
615 * sink could have closed it from an IRQ.
616 * The sink driver must handle the race with
617 * update_buffer() and IRQ. Thus either we
618 * should get a valid handle and valid size
621 * But we should never get a non-zero size with
624 if (READ_ONCE(handle->event))
625 perf_aux_output_end(handle, size);
630 /* Disabling the path make its elements available to other sessions */
631 coresight_disable_path(path);
634 static int etm_event_add(struct perf_event *event, int mode)
637 struct hw_perf_event *hwc = &event->hw;
639 if (mode & PERF_EF_START) {
640 etm_event_start(event, 0);
641 if (hwc->state & PERF_HES_STOPPED)
644 hwc->state = PERF_HES_STOPPED;
650 static void etm_event_del(struct perf_event *event, int mode)
652 etm_event_stop(event, PERF_EF_UPDATE);
655 static int etm_addr_filters_validate(struct list_head *filters)
657 bool range = false, address = false;
659 struct perf_addr_filter *filter;
661 list_for_each_entry(filter, filters, entry) {
663 * No need to go further if there's no more
666 if (++index > ETM_ADDR_CMP_MAX)
669 /* filter::size==0 means single address trigger */
672 * The existing code relies on START/STOP filters
673 * being address filters.
675 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
676 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
684 * At this time we don't allow range and start/stop filtering
685 * to cohabitate, they have to be mutually exclusive.
687 if (range && address)
694 static void etm_addr_filters_sync(struct perf_event *event)
696 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
697 unsigned long start, stop;
698 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
699 struct etm_filters *filters = event->hw.addr_filters;
700 struct etm_filter *etm_filter;
701 struct perf_addr_filter *filter;
704 list_for_each_entry(filter, &head->list, entry) {
706 stop = start + fr[i].size;
707 etm_filter = &filters->etm_filter[i];
709 switch (filter->action) {
710 case PERF_ADDR_FILTER_ACTION_FILTER:
711 etm_filter->start_addr = start;
712 etm_filter->stop_addr = stop;
713 etm_filter->type = ETM_ADDR_TYPE_RANGE;
715 case PERF_ADDR_FILTER_ACTION_START:
716 etm_filter->start_addr = start;
717 etm_filter->type = ETM_ADDR_TYPE_START;
719 case PERF_ADDR_FILTER_ACTION_STOP:
720 etm_filter->stop_addr = stop;
721 etm_filter->type = ETM_ADDR_TYPE_STOP;
727 filters->nr_filters = i;
730 int etm_perf_symlink(struct coresight_device *csdev, bool link)
732 char entry[sizeof("cpu9999999")];
733 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
734 struct device *pmu_dev = etm_pmu.dev;
735 struct device *cs_dev = &csdev->dev;
737 sprintf(entry, "cpu%d", cpu);
740 return -EPROBE_DEFER;
743 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
746 per_cpu(csdev_src, cpu) = csdev;
748 sysfs_remove_link(&pmu_dev->kobj, entry);
749 per_cpu(csdev_src, cpu) = NULL;
754 EXPORT_SYMBOL_GPL(etm_perf_symlink);
756 static ssize_t etm_perf_sink_name_show(struct device *dev,
757 struct device_attribute *dattr,
760 struct dev_ext_attribute *ea;
762 ea = container_of(dattr, struct dev_ext_attribute, attr);
763 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
766 static struct dev_ext_attribute *
767 etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
769 struct dev_ext_attribute *ea;
772 struct device *pmu_dev = etm_pmu.dev;
775 return ERR_PTR(-EPROBE_DEFER);
777 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
779 return ERR_PTR(-ENOMEM);
782 * If this function is called adding a sink then the hash is used for
783 * sink selection - see function coresight_get_sink_by_id().
784 * If adding a configuration then the hash is used for selection in
785 * cscfg_activate_config()
787 hash = hashlen_hash(hashlen_string(NULL, name));
789 sysfs_attr_init(&ea->attr.attr);
790 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
791 if (!ea->attr.attr.name)
792 return ERR_PTR(-ENOMEM);
794 ea->attr.attr.mode = 0444;
795 ea->var = (unsigned long *)hash;
797 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
798 &ea->attr.attr, group_name);
800 return ret ? ERR_PTR(ret) : ea;
803 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
806 struct device *dev = &csdev->dev;
809 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
810 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
813 if (csdev->ea != NULL)
816 name = dev_name(dev);
817 csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks");
818 if (IS_ERR(csdev->ea)) {
819 err = PTR_ERR(csdev->ea);
822 csdev->ea->attr.show = etm_perf_sink_name_show;
827 static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
829 struct device *pmu_dev = etm_pmu.dev;
831 sysfs_remove_file_from_group(&pmu_dev->kobj,
832 &ea->attr.attr, group_name);
835 void etm_perf_del_symlink_sink(struct coresight_device *csdev)
837 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
838 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
844 etm_perf_del_symlink_group(csdev->ea, "sinks");
848 static ssize_t etm_perf_cscfg_event_show(struct device *dev,
849 struct device_attribute *dattr,
852 struct dev_ext_attribute *ea;
854 ea = container_of(dattr, struct dev_ext_attribute, attr);
855 return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var));
858 int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
862 if (config_desc->event_ea != NULL)
865 config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events");
867 /* set the show function to the custom cscfg event */
868 if (!IS_ERR(config_desc->event_ea))
869 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
871 err = PTR_ERR(config_desc->event_ea);
872 config_desc->event_ea = NULL;
878 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
880 if (!config_desc->event_ea)
883 etm_perf_del_symlink_group(config_desc->event_ea, "events");
884 config_desc->event_ea = NULL;
887 int __init etm_perf_init(void)
891 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
892 PERF_PMU_CAP_ITRACE);
894 etm_pmu.attr_groups = etm_pmu_attr_groups;
895 etm_pmu.task_ctx_nr = perf_sw_context;
896 etm_pmu.read = etm_event_read;
897 etm_pmu.event_init = etm_event_init;
898 etm_pmu.setup_aux = etm_setup_aux;
899 etm_pmu.free_aux = etm_free_aux;
900 etm_pmu.start = etm_event_start;
901 etm_pmu.stop = etm_event_stop;
902 etm_pmu.add = etm_event_add;
903 etm_pmu.del = etm_event_del;
904 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
905 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
906 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
907 etm_pmu.module = THIS_MODULE;
909 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
916 void etm_perf_exit(void)
918 perf_pmu_unregister(&etm_pmu);