drivers/mmc/host/omap.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  linux/drivers/mmc/host/omap.c
   4  *
   5  *  Copyright (C) 2004 Nokia Corporation
   6  *  Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com>
   7  *  Misc hacks here and there by Tony Lindgren <tony@atomide.com>
   8  *  Other hacks (DMA, SD, etc) by David Brownell
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/moduleparam.h>
  13 #include <linux/init.h>
  14 #include <linux/ioport.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/dmaengine.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/delay.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/timer.h>
  22 #include <linux/of.h>
  23 #include <linux/mmc/host.h>
  24 #include <linux/mmc/card.h>
  25 #include <linux/mmc/mmc.h>
  26 #include <linux/clk.h>
  27 #include <linux/scatterlist.h>
  28 #include <linux/slab.h>
  29 #include <linux/gpio/consumer.h>
  30 #include <linux/platform_data/mmc-omap.h>
  31
  32
  33 #define OMAP_MMC_REG_CMD        0x00
  34 #define OMAP_MMC_REG_ARGL       0x01
  35 #define OMAP_MMC_REG_ARGH       0x02
  36 #define OMAP_MMC_REG_CON        0x03
  37 #define OMAP_MMC_REG_STAT       0x04
  38 #define OMAP_MMC_REG_IE         0x05
  39 #define OMAP_MMC_REG_CTO        0x06
  40 #define OMAP_MMC_REG_DTO        0x07
  41 #define OMAP_MMC_REG_DATA       0x08
  42 #define OMAP_MMC_REG_BLEN       0x09
  43 #define OMAP_MMC_REG_NBLK       0x0a
  44 #define OMAP_MMC_REG_BUF        0x0b
  45 #define OMAP_MMC_REG_SDIO       0x0d
  46 #define OMAP_MMC_REG_REV        0x0f
  47 #define OMAP_MMC_REG_RSP0       0x10
  48 #define OMAP_MMC_REG_RSP1       0x11
  49 #define OMAP_MMC_REG_RSP2       0x12
  50 #define OMAP_MMC_REG_RSP3       0x13
  51 #define OMAP_MMC_REG_RSP4       0x14
  52 #define OMAP_MMC_REG_RSP5       0x15
  53 #define OMAP_MMC_REG_RSP6       0x16
  54 #define OMAP_MMC_REG_RSP7       0x17
  55 #define OMAP_MMC_REG_IOSR       0x18
  56 #define OMAP_MMC_REG_SYSC       0x19
  57 #define OMAP_MMC_REG_SYSS       0x1a
  58
  59 #define OMAP_MMC_STAT_CARD_ERR          (1 << 14)
  60 #define OMAP_MMC_STAT_CARD_IRQ          (1 << 13)
  61 #define OMAP_MMC_STAT_OCR_BUSY          (1 << 12)
  62 #define OMAP_MMC_STAT_A_EMPTY           (1 << 11)
  63 #define OMAP_MMC_STAT_A_FULL            (1 << 10)
  64 #define OMAP_MMC_STAT_CMD_CRC           (1 <<  8)
  65 #define OMAP_MMC_STAT_CMD_TOUT          (1 <<  7)
  66 #define OMAP_MMC_STAT_DATA_CRC          (1 <<  6)
  67 #define OMAP_MMC_STAT_DATA_TOUT         (1 <<  5)
  68 #define OMAP_MMC_STAT_END_BUSY          (1 <<  4)
  69 #define OMAP_MMC_STAT_END_OF_DATA       (1 <<  3)
  70 #define OMAP_MMC_STAT_CARD_BUSY         (1 <<  2)
  71 #define OMAP_MMC_STAT_END_OF_CMD        (1 <<  0)
  72
  73 #define mmc_omap7xx()   (host->features & MMC_OMAP7XX)
  74 #define mmc_omap15xx()  (host->features & MMC_OMAP15XX)
  75 #define mmc_omap16xx()  (host->features & MMC_OMAP16XX)
  76 #define MMC_OMAP1_MASK  (MMC_OMAP7XX | MMC_OMAP15XX | MMC_OMAP16XX)
  77 #define mmc_omap1()     (host->features & MMC_OMAP1_MASK)
  78 #define mmc_omap2()     (!mmc_omap1())
  79
  80 #define OMAP_MMC_REG(host, reg)         (OMAP_MMC_REG_##reg << (host)->reg_shift)
  81 #define OMAP_MMC_READ(host, reg)        __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
  82 #define OMAP_MMC_WRITE(host, reg, val)  __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
  83
  84 /*
  85  * Command types
  86  */
  87 #define OMAP_MMC_CMDTYPE_BC     0
  88 #define OMAP_MMC_CMDTYPE_BCR    1
  89 #define OMAP_MMC_CMDTYPE_AC     2
  90 #define OMAP_MMC_CMDTYPE_ADTC   3
  91
  92 #define DRIVER_NAME "mmci-omap"
  93
  94 /* Specifies how often in millisecs to poll for card status changes
  95  * when the cover switch is open */
  96 #define OMAP_MMC_COVER_POLL_DELAY       500
  97
  98 struct mmc_omap_host;
  99
 100 struct mmc_omap_slot {
 101         int                     id;
 102         unsigned int            vdd;
 103         u16                     saved_con;
 104         u16                     bus_mode;
 105         u16                     power_mode;
 106         unsigned int            fclk_freq;
 107
 108         struct tasklet_struct   cover_tasklet;
 109         struct timer_list       cover_timer;
 110         unsigned                cover_open;
 111
 112         struct mmc_request      *mrq;
 113         struct mmc_omap_host    *host;
 114         struct mmc_host         *mmc;
 115         struct gpio_desc        *vsd;
 116         struct gpio_desc        *vio;
 117         struct gpio_desc        *cover;
 118         struct omap_mmc_slot_data *pdata;
 119 };
 120
 121 struct mmc_omap_host {
 122         int                     initialized;
 123         struct mmc_request *    mrq;
 124         struct mmc_command *    cmd;
 125         struct mmc_data *       data;
 126         struct mmc_host *       mmc;
 127         struct device *         dev;
 128         unsigned char           id; /* 16xx chips have 2 MMC blocks */
 129         struct clk *            iclk;
 130         struct clk *            fclk;
 131         struct dma_chan         *dma_rx;
 132         u32                     dma_rx_burst;
 133         struct dma_chan         *dma_tx;
 134         u32                     dma_tx_burst;
 135         void __iomem            *virt_base;
 136         unsigned int            phys_base;
 137         int                     irq;
 138         unsigned char           bus_mode;
 139         unsigned int            reg_shift;
 140         struct gpio_desc        *slot_switch;
 141
 142         struct work_struct      cmd_abort_work;
 143         unsigned                abort:1;
 144         struct timer_list       cmd_abort_timer;
 145
 146         struct work_struct      slot_release_work;
 147         struct mmc_omap_slot    *next_slot;
 148         struct work_struct      send_stop_work;
 149         struct mmc_data         *stop_data;
 150
 151         struct sg_mapping_iter  sg_miter;
 152         unsigned int            sg_len;
 153         u32                     total_bytes_left;
 154
 155         unsigned                features;
 156         unsigned                brs_received:1, dma_done:1;
 157         unsigned                dma_in_use:1;
 158         spinlock_t              dma_lock;
 159
 160         struct mmc_omap_slot    *slots[OMAP_MMC_MAX_SLOTS];
 161         struct mmc_omap_slot    *current_slot;
 162         spinlock_t              slot_lock;
 163         wait_queue_head_t       slot_wq;
 164         int                     nr_slots;
 165
 166         struct timer_list       clk_timer;
 167         spinlock_t              clk_lock;     /* for changing enabled state */
 168         unsigned int            fclk_enabled:1;
 169         struct workqueue_struct *mmc_omap_wq;
 170
 171         struct omap_mmc_platform_data *pdata;
 172 };
 173
 174
 175 static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)
 176 {
 177         unsigned long tick_ns;
 178
 179         if (slot != NULL && slot->host->fclk_enabled && slot->fclk_freq > 0) {
 180                 tick_ns = DIV_ROUND_UP(NSEC_PER_SEC, slot->fclk_freq);
 181                 ndelay(8 * tick_ns);
 182         }
 183 }
 184
 185 static void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable)
 186 {
 187         unsigned long flags;
 188
 189         spin_lock_irqsave(&host->clk_lock, flags);
 190         if (host->fclk_enabled != enable) {
 191                 host->fclk_enabled = enable;
 192                 if (enable)
 193                         clk_enable(host->fclk);
 194                 else
 195                         clk_disable(host->fclk);
 196         }
 197         spin_unlock_irqrestore(&host->clk_lock, flags);
 198 }
 199
 200 static void mmc_omap_select_slot(struct mmc_omap_slot *slot, int claimed)
 201 {
 202         struct mmc_omap_host *host = slot->host;
 203         unsigned long flags;
 204
 205         if (claimed)
 206                 goto no_claim;
 207         spin_lock_irqsave(&host->slot_lock, flags);
 208         while (host->mmc != NULL) {
 209                 spin_unlock_irqrestore(&host->slot_lock, flags);
 210                 wait_event(host->slot_wq, host->mmc == NULL);
 211                 spin_lock_irqsave(&host->slot_lock, flags);
 212         }
 213         host->mmc = slot->mmc;
 214         spin_unlock_irqrestore(&host->slot_lock, flags);
 215 no_claim:
 216         del_timer(&host->clk_timer);
 217         if (host->current_slot != slot || !claimed)
 218                 mmc_omap_fclk_offdelay(host->current_slot);
 219
 220         if (host->current_slot != slot) {
 221                 OMAP_MMC_WRITE(host, CON, slot->saved_con & 0xFC00);
 222                 if (host->slot_switch)
 223                         /*
 224                          * With two slots and a simple GPIO switch, setting
 225                          * the GPIO to 0 selects slot ID 0, setting it to 1
 226                          * selects slot ID 1.
 227                          */
 228                         gpiod_set_value(host->slot_switch, slot->id);
 229                 host->current_slot = slot;
 230         }
 231
 232         if (claimed) {
 233                 mmc_omap_fclk_enable(host, 1);
 234
 235                 /* Doing the dummy read here seems to work around some bug
 236                  * at least in OMAP24xx silicon where the command would not
 237                  * start after writing the CMD register. Sigh. */
 238                 OMAP_MMC_READ(host, CON);
 239
 240                 OMAP_MMC_WRITE(host, CON, slot->saved_con);
 241         } else
 242                 mmc_omap_fclk_enable(host, 0);
 243 }
 244
 245 static void mmc_omap_start_request(struct mmc_omap_host *host,
 246                                    struct mmc_request *req);
 247
 248 static void mmc_omap_slot_release_work(struct work_struct *work)
 249 {
 250         struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
 251                                                   slot_release_work);
 252         struct mmc_omap_slot *next_slot = host->next_slot;
 253         struct mmc_request *rq;
 254
 255         host->next_slot = NULL;
 256         mmc_omap_select_slot(next_slot, 1);
 257
 258         rq = next_slot->mrq;
 259         next_slot->mrq = NULL;
 260         mmc_omap_start_request(host, rq);
 261 }
 262
 263 static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled)
 264 {
 265         struct mmc_omap_host *host = slot->host;
 266         unsigned long flags;
 267         int i;
 268
 269         BUG_ON(slot == NULL || host->mmc == NULL);
 270
 271         if (clk_enabled)
 272                 /* Keeps clock running for at least 8 cycles on valid freq */
 273                 mod_timer(&host->clk_timer, jiffies  + HZ/10);
 274         else {
 275                 del_timer(&host->clk_timer);
 276                 mmc_omap_fclk_offdelay(slot);
 277                 mmc_omap_fclk_enable(host, 0);
 278         }
 279
 280         spin_lock_irqsave(&host->slot_lock, flags);
 281         /* Check for any pending requests */
 282         for (i = 0; i < host->nr_slots; i++) {
 283                 struct mmc_omap_slot *new_slot;
 284
 285                 if (host->slots[i] == NULL || host->slots[i]->mrq == NULL)
 286                         continue;
 287
 288                 BUG_ON(host->next_slot != NULL);
 289                 new_slot = host->slots[i];
 290                 /* The current slot should not have a request in queue */
 291                 BUG_ON(new_slot == host->current_slot);
 292
 293                 host->next_slot = new_slot;
 294                 host->mmc = new_slot->mmc;
 295                 spin_unlock_irqrestore(&host->slot_lock, flags);
 296                 queue_work(host->mmc_omap_wq, &host->slot_release_work);
 297                 return;
 298         }
 299
 300         host->mmc = NULL;
 301         wake_up(&host->slot_wq);
 302         spin_unlock_irqrestore(&host->slot_lock, flags);
 303 }
 304
 305 static inline
 306 int mmc_omap_cover_is_open(struct mmc_omap_slot *slot)
 307 {
 308         /* If we have a GPIO then use that */
 309         if (slot->cover)
 310                 return gpiod_get_value(slot->cover);
 311         if (slot->pdata->get_cover_state)
 312                 return slot->pdata->get_cover_state(mmc_dev(slot->mmc),
 313                                                     slot->id);
 314         return 0;
 315 }
 316
 317 static ssize_t
 318 mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr,
 319                            char *buf)
 320 {
 321         struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
 322         struct mmc_omap_slot *slot = mmc_priv(mmc);
 323
 324         return sprintf(buf, "%s\n", mmc_omap_cover_is_open(slot) ? "open" :
 325                        "closed");
 326 }
 327
 328 static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
 329
 330 static ssize_t
 331 mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr,
 332                         char *buf)
 333 {
 334         struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
 335         struct mmc_omap_slot *slot = mmc_priv(mmc);
 336
 337         return sprintf(buf, "%s\n", slot->pdata->name);
 338 }
 339
 340 static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL);
 341
 342 static void
 343 mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
 344 {
 345         u32 cmdreg;
 346         u32 resptype;
 347         u32 cmdtype;
 348         u16 irq_mask;
 349
 350         host->cmd = cmd;
 351
 352         resptype = 0;
 353         cmdtype = 0;
 354
 355         /* Our hardware needs to know exact type */
 356         switch (mmc_resp_type(cmd)) {
 357         case MMC_RSP_NONE:
 358                 break;
 359         case MMC_RSP_R1:
 360         case MMC_RSP_R1B:
 361                 /* resp 1, 1b, 6, 7 */
 362                 resptype = 1;
 363                 break;
 364         case MMC_RSP_R2:
 365                 resptype = 2;
 366                 break;
 367         case MMC_RSP_R3:
 368                 resptype = 3;
 369                 break;
 370         default:
 371                 dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd));
 372                 break;
 373         }
 374
 375         if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) {
 376                 cmdtype = OMAP_MMC_CMDTYPE_ADTC;
 377         } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) {
 378                 cmdtype = OMAP_MMC_CMDTYPE_BC;
 379         } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) {
 380                 cmdtype = OMAP_MMC_CMDTYPE_BCR;
 381         } else {
 382                 cmdtype = OMAP_MMC_CMDTYPE_AC;
 383         }
 384
 385         cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12);
 386
 387         if (host->current_slot->bus_mode == MMC_BUSMODE_OPENDRAIN)
 388                 cmdreg |= 1 << 6;
 389
 390         if (cmd->flags & MMC_RSP_BUSY)
 391                 cmdreg |= 1 << 11;
 392
 393         if (host->data && !(host->data->flags & MMC_DATA_WRITE))
 394                 cmdreg |= 1 << 15;
 395
 396         mod_timer(&host->cmd_abort_timer, jiffies + HZ/2);
 397
 398         OMAP_MMC_WRITE(host, CTO, 200);
 399         OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
 400         OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
 401         irq_mask = OMAP_MMC_STAT_A_EMPTY    | OMAP_MMC_STAT_A_FULL    |
 402                    OMAP_MMC_STAT_CMD_CRC    | OMAP_MMC_STAT_CMD_TOUT  |
 403                    OMAP_MMC_STAT_DATA_CRC   | OMAP_MMC_STAT_DATA_TOUT |
 404                    OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR  |
 405                    OMAP_MMC_STAT_END_OF_DATA;
 406         if (cmd->opcode == MMC_ERASE)
 407                 irq_mask &= ~OMAP_MMC_STAT_DATA_TOUT;
 408         OMAP_MMC_WRITE(host, IE, irq_mask);
 409         OMAP_MMC_WRITE(host, CMD, cmdreg);
 410 }
 411
 412 static void
 413 mmc_omap_release_dma(struct mmc_omap_host *host, struct mmc_data *data,
 414                      int abort)
 415 {
 416         enum dma_data_direction dma_data_dir;
 417         struct device *dev = mmc_dev(host->mmc);
 418         struct dma_chan *c;
 419
 420         if (data->flags & MMC_DATA_WRITE) {
 421                 dma_data_dir = DMA_TO_DEVICE;
 422                 c = host->dma_tx;
 423         } else {
 424                 dma_data_dir = DMA_FROM_DEVICE;
 425                 c = host->dma_rx;
 426         }
 427         if (c) {
 428                 if (data->error) {
 429                         dmaengine_terminate_all(c);
 430                         /* Claim nothing transferred on error... */
 431                         data->bytes_xfered = 0;
 432                 }
 433                 dev = c->device->dev;
 434         }
 435         dma_unmap_sg(dev, data->sg, host->sg_len, dma_data_dir);
 436 }
 437
 438 static void mmc_omap_send_stop_work(struct work_struct *work)
 439 {
 440         struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
 441                                                   send_stop_work);
 442         struct mmc_omap_slot *slot = host->current_slot;
 443         struct mmc_data *data = host->stop_data;
 444         unsigned long tick_ns;
 445
 446         tick_ns = DIV_ROUND_UP(NSEC_PER_SEC, slot->fclk_freq);
 447         ndelay(8*tick_ns);
 448
 449         mmc_omap_start_command(host, data->stop);
 450 }
 451
 452 static void
 453 mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
 454 {
 455         if (host->dma_in_use)
 456                 mmc_omap_release_dma(host, data, data->error);
 457         else
 458                 sg_miter_stop(&host->sg_miter);
 459
 460         host->data = NULL;
 461         host->sg_len = 0;
 462
 463         /* NOTE:  MMC layer will sometimes poll-wait CMD13 next, issuing
 464          * dozens of requests until the card finishes writing data.
 465          * It'd be cheaper to just wait till an EOFB interrupt arrives...
 466          */
 467
 468         if (!data->stop) {
 469                 struct mmc_host *mmc;
 470
 471                 host->mrq = NULL;
 472                 mmc = host->mmc;
 473                 mmc_omap_release_slot(host->current_slot, 1);
 474                 mmc_request_done(mmc, data->mrq);
 475                 return;
 476         }
 477
 478         host->stop_data = data;
 479         queue_work(host->mmc_omap_wq, &host->send_stop_work);
 480 }
 481
 482 static void
 483 mmc_omap_send_abort(struct mmc_omap_host *host, int maxloops)
 484 {
 485         struct mmc_omap_slot *slot = host->current_slot;
 486         unsigned int restarts, passes, timeout;
 487         u16 stat = 0;
 488
 489         /* Sending abort takes 80 clocks. Have some extra and round up */
 490         timeout = DIV_ROUND_UP(120 * USEC_PER_SEC, slot->fclk_freq);
 491         restarts = 0;
 492         while (restarts < maxloops) {
 493                 OMAP_MMC_WRITE(host, STAT, 0xFFFF);
 494                 OMAP_MMC_WRITE(host, CMD, (3 << 12) | (1 << 7));
 495
 496                 passes = 0;
 497                 while (passes < timeout) {
 498                         stat = OMAP_MMC_READ(host, STAT);
 499                         if (stat & OMAP_MMC_STAT_END_OF_CMD)
 500                                 goto out;
 501                         udelay(1);
 502                         passes++;
 503                 }
 504
 505                 restarts++;
 506         }
 507 out:
 508         OMAP_MMC_WRITE(host, STAT, stat);
 509 }
 510
 511 static void
 512 mmc_omap_abort_xfer(struct mmc_omap_host *host, struct mmc_data *data)
 513 {
 514         if (host->dma_in_use)
 515                 mmc_omap_release_dma(host, data, 1);
 516
 517         host->data = NULL;
 518         host->sg_len = 0;
 519
 520         mmc_omap_send_abort(host, 10000);
 521 }
 522
 523 static void
 524 mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data)
 525 {
 526         unsigned long flags;
 527         int done;
 528
 529         if (!host->dma_in_use) {
 530                 mmc_omap_xfer_done(host, data);
 531                 return;
 532         }
 533         done = 0;
 534         spin_lock_irqsave(&host->dma_lock, flags);
 535         if (host->dma_done)
 536                 done = 1;
 537         else
 538                 host->brs_received = 1;
 539         spin_unlock_irqrestore(&host->dma_lock, flags);
 540         if (done)
 541                 mmc_omap_xfer_done(host, data);
 542 }
 543
 544 static void
 545 mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data)
 546 {
 547         unsigned long flags;
 548         int done;
 549
 550         done = 0;
 551         spin_lock_irqsave(&host->dma_lock, flags);
 552         if (host->brs_received)
 553                 done = 1;
 554         else
 555                 host->dma_done = 1;
 556         spin_unlock_irqrestore(&host->dma_lock, flags);
 557         if (done)
 558                 mmc_omap_xfer_done(host, data);
 559 }
 560
 561 static void
 562 mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
 563 {
 564         host->cmd = NULL;
 565
 566         del_timer(&host->cmd_abort_timer);
 567
 568         if (cmd->flags & MMC_RSP_PRESENT) {
 569                 if (cmd->flags & MMC_RSP_136) {
 570                         /* response type 2 */
 571                         cmd->resp[3] =
 572                                 OMAP_MMC_READ(host, RSP0) |
 573                                 (OMAP_MMC_READ(host, RSP1) << 16);
 574                         cmd->resp[2] =
 575                                 OMAP_MMC_READ(host, RSP2) |
 576                                 (OMAP_MMC_READ(host, RSP3) << 16);
 577                         cmd->resp[1] =
 578                                 OMAP_MMC_READ(host, RSP4) |
 579                                 (OMAP_MMC_READ(host, RSP5) << 16);
 580                         cmd->resp[0] =
 581                                 OMAP_MMC_READ(host, RSP6) |
 582                                 (OMAP_MMC_READ(host, RSP7) << 16);
 583                 } else {
 584                         /* response types 1, 1b, 3, 4, 5, 6 */
 585                         cmd->resp[0] =
 586                                 OMAP_MMC_READ(host, RSP6) |
 587                                 (OMAP_MMC_READ(host, RSP7) << 16);
 588                 }
 589         }
 590
 591         if (host->data == NULL || cmd->error) {
 592                 struct mmc_host *mmc;
 593
 594                 if (host->data != NULL)
 595                         mmc_omap_abort_xfer(host, host->data);
 596                 host->mrq = NULL;
 597                 mmc = host->mmc;
 598                 mmc_omap_release_slot(host->current_slot, 1);
 599                 mmc_request_done(mmc, cmd->mrq);
 600         }
 601 }
 602
 603 /*
 604  * Abort stuck command. Can occur when card is removed while it is being
 605  * read.
 606  */
 607 static void mmc_omap_abort_command(struct work_struct *work)
 608 {
 609         struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
 610                                                   cmd_abort_work);
 611         BUG_ON(!host->cmd);
 612
 613         dev_dbg(mmc_dev(host->mmc), "Aborting stuck command CMD%d\n",
 614                 host->cmd->opcode);
 615
 616         if (host->cmd->error == 0)
 617                 host->cmd->error = -ETIMEDOUT;
 618
 619         if (host->data == NULL) {
 620                 struct mmc_command *cmd;
 621                 struct mmc_host    *mmc;
 622
 623                 cmd = host->cmd;
 624                 host->cmd = NULL;
 625                 mmc_omap_send_abort(host, 10000);
 626
 627                 host->mrq = NULL;
 628                 mmc = host->mmc;
 629                 mmc_omap_release_slot(host->current_slot, 1);
 630                 mmc_request_done(mmc, cmd->mrq);
 631         } else
 632                 mmc_omap_cmd_done(host, host->cmd);
 633
 634         host->abort = 0;
 635         enable_irq(host->irq);
 636 }
 637
 638 static void
 639 mmc_omap_cmd_timer(struct timer_list *t)
 640 {
 641         struct mmc_omap_host *host = from_timer(host, t, cmd_abort_timer);
 642         unsigned long flags;
 643
 644         spin_lock_irqsave(&host->slot_lock, flags);
 645         if (host->cmd != NULL && !host->abort) {
 646                 OMAP_MMC_WRITE(host, IE, 0);
 647                 disable_irq(host->irq);
 648                 host->abort = 1;
 649                 queue_work(host->mmc_omap_wq, &host->cmd_abort_work);
 650         }
 651         spin_unlock_irqrestore(&host->slot_lock, flags);
 652 }
 653
 654 static void
 655 mmc_omap_clk_timer(struct timer_list *t)
 656 {
 657         struct mmc_omap_host *host = from_timer(host, t, clk_timer);
 658
 659         mmc_omap_fclk_enable(host, 0);
 660 }
 661
 662 /* PIO only */
 663 static void
 664 mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
 665 {
 666         struct sg_mapping_iter *sgm = &host->sg_miter;
 667         int n, nwords;
 668         u16 *buffer;
 669
 670         if (!sg_miter_next(sgm)) {
 671                 /* This should not happen */
 672                 dev_err(mmc_dev(host->mmc), "ran out of scatterlist prematurely\n");
 673                 return;
 674         }
 675         buffer = sgm->addr;
 676
 677         n = 64;
 678         if (n > sgm->length)
 679                 n = sgm->length;
 680         if (n > host->total_bytes_left)
 681                 n = host->total_bytes_left;
 682
 683         /* Round up to handle odd number of bytes to transfer */
 684         nwords = DIV_ROUND_UP(n, 2);
 685
 686         sgm->consumed = n;
 687         host->total_bytes_left -= n;
 688         host->data->bytes_xfered += n;
 689
 690         if (write) {
 691                 __raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA),
 692                               buffer, nwords);
 693         } else {
 694                 __raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA),
 695                              buffer, nwords);
 696         }
 697 }
 698
 699 #ifdef CONFIG_MMC_DEBUG
 700 static void mmc_omap_report_irq(struct mmc_omap_host *host, u16 status)
 701 {
 702         static const char *mmc_omap_status_bits[] = {
 703                 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
 704                 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
 705         };
 706         int i;
 707         char res[64], *buf = res;
 708
 709         buf += sprintf(buf, "MMC IRQ 0x%x:", status);
 710
 711         for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
 712                 if (status & (1 << i))
 713                         buf += sprintf(buf, " %s", mmc_omap_status_bits[i]);
 714         dev_vdbg(mmc_dev(host->mmc), "%s\n", res);
 715 }
 716 #else
 717 static void mmc_omap_report_irq(struct mmc_omap_host *host, u16 status)
 718 {
 719 }
 720 #endif
 721
 722
 723 static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
 724 {
 725         struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
 726         u16 status;
 727         int end_command;
 728         int end_transfer;
 729         int transfer_error, cmd_error;
 730
 731         if (host->cmd == NULL && host->data == NULL) {
 732                 status = OMAP_MMC_READ(host, STAT);
 733                 dev_info(mmc_dev(host->slots[0]->mmc),
 734                          "Spurious IRQ 0x%04x\n", status);
 735                 if (status != 0) {
 736                         OMAP_MMC_WRITE(host, STAT, status);
 737                         OMAP_MMC_WRITE(host, IE, 0);
 738                 }
 739                 return IRQ_HANDLED;
 740         }
 741
 742         end_command = 0;
 743         end_transfer = 0;
 744         transfer_error = 0;
 745         cmd_error = 0;
 746
 747         while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
 748                 int cmd;
 749
 750                 OMAP_MMC_WRITE(host, STAT, status);
 751                 if (host->cmd != NULL)
 752                         cmd = host->cmd->opcode;
 753                 else
 754                         cmd = -1;
 755                 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
 756                         status, cmd);
 757                 mmc_omap_report_irq(host, status);
 758
 759                 if (host->total_bytes_left) {
 760                         if ((status & OMAP_MMC_STAT_A_FULL) ||
 761                             (status & OMAP_MMC_STAT_END_OF_DATA))
 762                                 mmc_omap_xfer_data(host, 0);
 763                         if (status & OMAP_MMC_STAT_A_EMPTY)
 764                                 mmc_omap_xfer_data(host, 1);
 765                 }
 766
 767                 if (status & OMAP_MMC_STAT_END_OF_DATA)
 768                         end_transfer = 1;
 769
 770                 if (status & OMAP_MMC_STAT_DATA_TOUT) {
 771                         dev_dbg(mmc_dev(host->mmc), "data timeout (CMD%d)\n",
 772                                 cmd);
 773                         if (host->data) {
 774                                 host->data->error = -ETIMEDOUT;
 775                                 transfer_error = 1;
 776                         }
 777                 }
 778
 779                 if (status & OMAP_MMC_STAT_DATA_CRC) {
 780                         if (host->data) {
 781                                 host->data->error = -EILSEQ;
 782                                 dev_dbg(mmc_dev(host->mmc),
 783                                          "data CRC error, bytes left %d\n",
 784                                         host->total_bytes_left);
 785                                 transfer_error = 1;
 786                         } else {
 787                                 dev_dbg(mmc_dev(host->mmc), "data CRC error\n");
 788                         }
 789                 }
 790
 791                 if (status & OMAP_MMC_STAT_CMD_TOUT) {
 792                         /* Timeouts are routine with some commands */
 793                         if (host->cmd) {
 794                                 struct mmc_omap_slot *slot =
 795                                         host->current_slot;
 796                                 if (slot == NULL ||
 797                                     !mmc_omap_cover_is_open(slot))
 798                                         dev_err(mmc_dev(host->mmc),
 799                                                 "command timeout (CMD%d)\n",
 800                                                 cmd);
 801                                 host->cmd->error = -ETIMEDOUT;
 802                                 end_command = 1;
 803                                 cmd_error = 1;
 804                         }
 805                 }
 806
 807                 if (status & OMAP_MMC_STAT_CMD_CRC) {
 808                         if (host->cmd) {
 809                                 dev_err(mmc_dev(host->mmc),
 810                                         "command CRC error (CMD%d, arg 0x%08x)\n",
 811                                         cmd, host->cmd->arg);
 812                                 host->cmd->error = -EILSEQ;
 813                                 end_command = 1;
 814                                 cmd_error = 1;
 815                         } else
 816                                 dev_err(mmc_dev(host->mmc),
 817                                         "command CRC error without cmd?\n");
 818                 }
 819
 820                 if (status & OMAP_MMC_STAT_CARD_ERR) {
 821                         dev_dbg(mmc_dev(host->mmc),
 822                                 "ignoring card status error (CMD%d)\n",
 823                                 cmd);
 824                         end_command = 1;
 825                 }
 826
 827                 /*
 828                  * NOTE: On 1610 the END_OF_CMD may come too early when
 829                  * starting a write
 830                  */
 831                 if ((status & OMAP_MMC_STAT_END_OF_CMD) &&
 832                     (!(status & OMAP_MMC_STAT_A_EMPTY))) {
 833                         end_command = 1;
 834                 }
 835         }
 836
 837         if (cmd_error && host->data) {
 838                 del_timer(&host->cmd_abort_timer);
 839                 host->abort = 1;
 840                 OMAP_MMC_WRITE(host, IE, 0);
 841                 disable_irq_nosync(host->irq);
 842                 queue_work(host->mmc_omap_wq, &host->cmd_abort_work);
 843                 return IRQ_HANDLED;
 844         }
 845
 846         if (end_command && host->cmd)
 847                 mmc_omap_cmd_done(host, host->cmd);
 848         if (host->data != NULL) {
 849                 if (transfer_error)
 850                         mmc_omap_xfer_done(host, host->data);
 851                 else if (end_transfer)
 852                         mmc_omap_end_of_data(host, host->data);
 853         }
 854
 855         return IRQ_HANDLED;
 856 }
 857
 858 void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed)
 859 {
 860         int cover_open;
 861         struct mmc_omap_host *host = dev_get_drvdata(dev);
 862         struct mmc_omap_slot *slot = host->slots[num];
 863
 864         BUG_ON(num >= host->nr_slots);
 865
 866         /* Other subsystems can call in here before we're initialised. */
 867         if (host->nr_slots == 0 || !host->slots[num])
 868                 return;
 869
 870         cover_open = mmc_omap_cover_is_open(slot);
 871         if (cover_open != slot->cover_open) {
 872                 slot->cover_open = cover_open;
 873                 sysfs_notify(&slot->mmc->class_dev.kobj, NULL, "cover_switch");
 874         }
 875
 876         tasklet_hi_schedule(&slot->cover_tasklet);
 877 }
 878
 879 static void mmc_omap_cover_timer(struct timer_list *t)
 880 {
 881         struct mmc_omap_slot *slot = from_timer(slot, t, cover_timer);
 882         tasklet_schedule(&slot->cover_tasklet);
 883 }
 884
 885 static void mmc_omap_cover_handler(struct tasklet_struct *t)
 886 {
 887         struct mmc_omap_slot *slot = from_tasklet(slot, t, cover_tasklet);
 888         int cover_open = mmc_omap_cover_is_open(slot);
 889
 890         mmc_detect_change(slot->mmc, 0);
 891         if (!cover_open)
 892                 return;
 893
 894         /*
 895          * If no card is inserted, we postpone polling until
 896          * the cover has been closed.
 897          */
 898         if (slot->mmc->card == NULL)
 899                 return;
 900
 901         mod_timer(&slot->cover_timer,
 902                   jiffies + msecs_to_jiffies(OMAP_MMC_COVER_POLL_DELAY));
 903 }
 904
 905 static void mmc_omap_dma_callback(void *priv)
 906 {
 907         struct mmc_omap_host *host = priv;
 908         struct mmc_data *data = host->data;
 909
 910         /* If we got to the end of DMA, assume everything went well */
 911         data->bytes_xfered += data->blocks * data->blksz;
 912
 913         mmc_omap_dma_done(host, data);
 914 }
 915
 916 static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 917 {
 918         u16 reg;
 919
 920         reg = OMAP_MMC_READ(host, SDIO);
 921         reg &= ~(1 << 5);
 922         OMAP_MMC_WRITE(host, SDIO, reg);
 923         /* Set maximum timeout */
 924         OMAP_MMC_WRITE(host, CTO, 0xfd);
 925 }
 926
 927 static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
 928 {
 929         unsigned int timeout, cycle_ns;
 930         u16 reg;
 931
 932         cycle_ns = 1000000000 / host->current_slot->fclk_freq;
 933         timeout = req->data->timeout_ns / cycle_ns;
 934         timeout += req->data->timeout_clks;
 935
 936         /* Check if we need to use timeout multiplier register */
 937         reg = OMAP_MMC_READ(host, SDIO);
 938         if (timeout > 0xffff) {
 939                 reg |= (1 << 5);
 940                 timeout /= 1024;
 941         } else
 942                 reg &= ~(1 << 5);
 943         OMAP_MMC_WRITE(host, SDIO, reg);
 944         OMAP_MMC_WRITE(host, DTO, timeout);
 945 }
 946
 947 static void
 948 mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
 949 {
 950         unsigned int miter_flags = SG_MITER_ATOMIC; /* Used from IRQ */
 951         struct mmc_data *data = req->data;
 952         int i, use_dma = 1, block_size;
 953         struct scatterlist *sg;
 954         unsigned sg_len;
 955
 956         host->data = data;
 957         if (data == NULL) {
 958                 OMAP_MMC_WRITE(host, BLEN, 0);
 959                 OMAP_MMC_WRITE(host, NBLK, 0);
 960                 OMAP_MMC_WRITE(host, BUF, 0);
 961                 host->dma_in_use = 0;
 962                 set_cmd_timeout(host, req);
 963                 return;
 964         }
 965
 966         block_size = data->blksz;
 967
 968         OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
 969         OMAP_MMC_WRITE(host, BLEN, block_size - 1);
 970         set_data_timeout(host, req);
 971
 972         /* cope with calling layer confusion; it issues "single
 973          * block" writes using multi-block scatterlists.
 974          */
 975         sg_len = (data->blocks == 1) ? 1 : data->sg_len;
 976
 977         /* Only do DMA for entire blocks */
 978         for_each_sg(data->sg, sg, sg_len, i) {
 979                 if ((sg->length % block_size) != 0) {
 980                         use_dma = 0;
 981                         break;
 982                 }
 983         }
 984
 985         if (use_dma) {
 986                 enum dma_data_direction dma_data_dir;
 987                 struct dma_async_tx_descriptor *tx;
 988                 struct dma_chan *c;
 989                 u32 burst, *bp;
 990                 u16 buf;
 991
 992                 /*
 993                  * FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx
 994                  * and 24xx. Use 16 or 32 word frames when the
 995                  * blocksize is at least that large. Blocksize is
 996                  * usually 512 bytes; but not for some SD reads.
 997                  */
 998                 burst = mmc_omap15xx() ? 32 : 64;
 999                 if (burst > data->blksz)
1000                         burst = data->blksz;
1001
1002                 burst >>= 1;
1003
1004                 if (data->flags & MMC_DATA_WRITE) {
1005                         c = host->dma_tx;
1006                         bp = &host->dma_tx_burst;
1007                         buf = 0x0f80 | (burst - 1) << 0;
1008                         dma_data_dir = DMA_TO_DEVICE;
1009                 } else {
1010                         c = host->dma_rx;
1011                         bp = &host->dma_rx_burst;
1012                         buf = 0x800f | (burst - 1) << 8;
1013                         dma_data_dir = DMA_FROM_DEVICE;
1014                 }
1015
1016                 if (!c)
1017                         goto use_pio;
1018
1019                 /* Only reconfigure if we have a different burst size */
1020                 if (*bp != burst) {
1021                         struct dma_slave_config cfg = {
1022                                 .src_addr = host->phys_base +
1023                                             OMAP_MMC_REG(host, DATA),
1024                                 .dst_addr = host->phys_base +
1025                                             OMAP_MMC_REG(host, DATA),
1026                                 .src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
1027                                 .dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
1028                                 .src_maxburst = burst,
1029                                 .dst_maxburst = burst,
1030                         };
1031
1032                         if (dmaengine_slave_config(c, &cfg))
1033                                 goto use_pio;
1034
1035                         *bp = burst;
1036                 }
1037
1038                 host->sg_len = dma_map_sg(c->device->dev, data->sg, sg_len,
1039                                           dma_data_dir);
1040                 if (host->sg_len == 0)
1041                         goto use_pio;
1042
1043                 tx = dmaengine_prep_slave_sg(c, data->sg, host->sg_len,
1044                         data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
1045                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1046                 if (!tx)
1047                         goto use_pio;
1048
1049                 OMAP_MMC_WRITE(host, BUF, buf);
1050
1051                 tx->callback = mmc_omap_dma_callback;
1052                 tx->callback_param = host;
1053                 dmaengine_submit(tx);
1054                 host->brs_received = 0;
1055                 host->dma_done = 0;
1056                 host->dma_in_use = 1;
1057                 return;
1058         }
1059  use_pio:
1060
1061         /* Revert to PIO? */
1062         OMAP_MMC_WRITE(host, BUF, 0x1f1f);
1063         host->total_bytes_left = data->blocks * block_size;
1064         host->sg_len = sg_len;
1065         if (data->flags & MMC_DATA_READ)
1066                 miter_flags |= SG_MITER_TO_SG;
1067         else
1068                 miter_flags |= SG_MITER_FROM_SG;
1069         sg_miter_start(&host->sg_miter, data->sg, data->sg_len, miter_flags);
1070         host->dma_in_use = 0;
1071 }
1072
1073 static void mmc_omap_start_request(struct mmc_omap_host *host,
1074                                    struct mmc_request *req)
1075 {
1076         BUG_ON(host->mrq != NULL);
1077
1078         host->mrq = req;
1079
1080         /* only touch fifo AFTER the controller readies it */
1081         mmc_omap_prepare_data(host, req);
1082         mmc_omap_start_command(host, req->cmd);
1083         if (host->dma_in_use) {
1084                 struct dma_chan *c = host->data->flags & MMC_DATA_WRITE ?
1085                                 host->dma_tx : host->dma_rx;
1086
1087                 dma_async_issue_pending(c);
1088         }
1089 }
1090
1091 static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
1092 {
1093         struct mmc_omap_slot *slot = mmc_priv(mmc);
1094         struct mmc_omap_host *host = slot->host;
1095         unsigned long flags;
1096
1097         spin_lock_irqsave(&host->slot_lock, flags);
1098         if (host->mmc != NULL) {
1099                 BUG_ON(slot->mrq != NULL);
1100                 slot->mrq = req;
1101                 spin_unlock_irqrestore(&host->slot_lock, flags);
1102                 return;
1103         } else
1104                 host->mmc = mmc;
1105         spin_unlock_irqrestore(&host->slot_lock, flags);
1106         mmc_omap_select_slot(slot, 1);
1107         mmc_omap_start_request(host, req);
1108 }
1109
1110 static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on,
1111                                 int vdd)
1112 {
1113         struct mmc_omap_host *host;
1114
1115         host = slot->host;
1116
1117         if (power_on) {
1118                 if (slot->vsd) {
1119                         gpiod_set_value(slot->vsd, power_on);
1120                         msleep(1);
1121                 }
1122                 if (slot->vio) {
1123                         gpiod_set_value(slot->vio, power_on);
1124                         msleep(1);
1125                 }
1126         } else {
1127                 if (slot->vio) {
1128                         gpiod_set_value(slot->vio, power_on);
1129                         msleep(50);
1130                 }
1131                 if (slot->vsd) {
1132                         gpiod_set_value(slot->vsd, power_on);
1133                         msleep(50);
1134                 }
1135         }
1136
1137         if (slot->pdata->set_power != NULL)
1138                 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on,
1139                                         vdd);
1140         if (mmc_omap2()) {
1141                 u16 w;
1142
1143                 if (power_on) {
1144                         w = OMAP_MMC_READ(host, CON);
1145                         OMAP_MMC_WRITE(host, CON, w | (1 << 11));
1146                 } else {
1147                         w = OMAP_MMC_READ(host, CON);
1148                         OMAP_MMC_WRITE(host, CON, w & ~(1 << 11));
1149                 }
1150         }
1151 }
1152
1153 static int mmc_omap_calc_divisor(struct mmc_host *mmc, struct mmc_ios *ios)
1154 {
1155         struct mmc_omap_slot *slot = mmc_priv(mmc);
1156         struct mmc_omap_host *host = slot->host;
1157         int func_clk_rate = clk_get_rate(host->fclk);
1158         int dsor;
1159
1160         if (ios->clock == 0)
1161                 return 0;
1162
1163         dsor = func_clk_rate / ios->clock;
1164         if (dsor < 1)
1165                 dsor = 1;
1166
1167         if (func_clk_rate / dsor > ios->clock)
1168                 dsor++;
1169
1170         if (dsor > 250)
1171                 dsor = 250;
1172
1173         slot->fclk_freq = func_clk_rate / dsor;
1174
1175         if (ios->bus_width == MMC_BUS_WIDTH_4)
1176                 dsor |= 1 << 15;
1177
1178         return dsor;
1179 }
1180
1181 static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1182 {
1183         struct mmc_omap_slot *slot = mmc_priv(mmc);
1184         struct mmc_omap_host *host = slot->host;
1185         int i, dsor;
1186         int clk_enabled, init_stream;
1187
1188         mmc_omap_select_slot(slot, 0);
1189
1190         dsor = mmc_omap_calc_divisor(mmc, ios);
1191
1192         if (ios->vdd != slot->vdd)
1193                 slot->vdd = ios->vdd;
1194
1195         clk_enabled = 0;
1196         init_stream = 0;
1197         switch (ios->power_mode) {
1198         case MMC_POWER_OFF:
1199                 mmc_omap_set_power(slot, 0, ios->vdd);
1200                 break;
1201         case MMC_POWER_UP:
1202                 /* Cannot touch dsor yet, just power up MMC */
1203                 mmc_omap_set_power(slot, 1, ios->vdd);
1204                 slot->power_mode = ios->power_mode;
1205                 goto exit;
1206         case MMC_POWER_ON:
1207                 mmc_omap_fclk_enable(host, 1);
1208                 clk_enabled = 1;
1209                 dsor |= 1 << 11;
1210                 if (slot->power_mode != MMC_POWER_ON)
1211                         init_stream = 1;
1212                 break;
1213         }
1214         slot->power_mode = ios->power_mode;
1215
1216         if (slot->bus_mode != ios->bus_mode) {
1217                 if (slot->pdata->set_bus_mode != NULL)
1218                         slot->pdata->set_bus_mode(mmc_dev(mmc), slot->id,
1219                                                   ios->bus_mode);
1220                 slot->bus_mode = ios->bus_mode;
1221         }
1222
1223         /* On insanely high arm_per frequencies something sometimes
1224          * goes somehow out of sync, and the POW bit is not being set,
1225          * which results in the while loop below getting stuck.
1226          * Writing to the CON register twice seems to do the trick. */
1227         for (i = 0; i < 2; i++)
1228                 OMAP_MMC_WRITE(host, CON, dsor);
1229         slot->saved_con = dsor;
1230         if (init_stream) {
1231                 /* worst case at 400kHz, 80 cycles makes 200 microsecs */
1232                 int usecs = 250;
1233
1234                 /* Send clock cycles, poll completion */
1235                 OMAP_MMC_WRITE(host, IE, 0);
1236                 OMAP_MMC_WRITE(host, STAT, 0xffff);
1237                 OMAP_MMC_WRITE(host, CMD, 1 << 7);
1238                 while (usecs > 0 && (OMAP_MMC_READ(host, STAT) & 1) == 0) {
1239                         udelay(1);
1240                         usecs--;
1241                 }
1242                 OMAP_MMC_WRITE(host, STAT, 1);
1243         }
1244
1245 exit:
1246         mmc_omap_release_slot(slot, clk_enabled);
1247 }
1248
1249 static const struct mmc_host_ops mmc_omap_ops = {
1250         .request        = mmc_omap_request,
1251         .set_ios        = mmc_omap_set_ios,
1252 };
1253
1254 static int mmc_omap_new_slot(struct mmc_omap_host *host, int id)
1255 {
1256         struct mmc_omap_slot *slot = NULL;
1257         struct mmc_host *mmc;
1258         int r;
1259
1260         mmc = mmc_alloc_host(sizeof(struct mmc_omap_slot), host->dev);
1261         if (mmc == NULL)
1262                 return -ENOMEM;
1263
1264         slot = mmc_priv(mmc);
1265         slot->host = host;
1266         slot->mmc = mmc;
1267         slot->id = id;
1268         slot->power_mode = MMC_POWER_UNDEFINED;
1269         slot->pdata = &host->pdata->slots[id];
1270
1271         /* Check for some optional GPIO controls */
1272         slot->vsd = devm_gpiod_get_index_optional(host->dev, "vsd",
1273                                                   id, GPIOD_OUT_LOW);
1274         if (IS_ERR(slot->vsd))
1275                 return dev_err_probe(host->dev, PTR_ERR(slot->vsd),
1276                                      "error looking up VSD GPIO\n");
1277         slot->vio = devm_gpiod_get_index_optional(host->dev, "vio",
1278                                                   id, GPIOD_OUT_LOW);
1279         if (IS_ERR(slot->vio))
1280                 return dev_err_probe(host->dev, PTR_ERR(slot->vio),
1281                                      "error looking up VIO GPIO\n");
1282         slot->cover = devm_gpiod_get_index_optional(host->dev, "cover",
1283                                                     id, GPIOD_IN);
1284         if (IS_ERR(slot->cover))
1285                 return dev_err_probe(host->dev, PTR_ERR(slot->cover),
1286                                      "error looking up cover switch GPIO\n");
1287
1288         host->slots[id] = slot;
1289
1290         mmc->caps = 0;
1291         if (host->pdata->slots[id].wires >= 4)
1292                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1293
1294         mmc->ops = &mmc_omap_ops;
1295         mmc->f_min = 400000;
1296
1297         if (mmc_omap2())
1298                 mmc->f_max = 48000000;
1299         else
1300                 mmc->f_max = 24000000;
1301         if (host->pdata->max_freq)
1302                 mmc->f_max = min(host->pdata->max_freq, mmc->f_max);
1303         mmc->ocr_avail = slot->pdata->ocr_mask;
1304
1305         /* Use scatterlist DMA to reduce per-transfer costs.
1306          * NOTE max_seg_size assumption that small blocks aren't
1307          * normally used (except e.g. for reading SD registers).
1308          */
1309         mmc->max_segs = 32;
1310         mmc->max_blk_size = 2048;       /* BLEN is 11 bits (+1) */
1311         mmc->max_blk_count = 2048;      /* NBLK is 11 bits (+1) */
1312         mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1313         mmc->max_seg_size = mmc->max_req_size;
1314
1315         if (slot->pdata->get_cover_state != NULL) {
1316                 timer_setup(&slot->cover_timer, mmc_omap_cover_timer, 0);
1317                 tasklet_setup(&slot->cover_tasklet, mmc_omap_cover_handler);
1318         }
1319
1320         r = mmc_add_host(mmc);
1321         if (r < 0)
1322                 goto err_remove_host;
1323
1324         if (slot->pdata->name != NULL) {
1325                 r = device_create_file(&mmc->class_dev,
1326                                         &dev_attr_slot_name);
1327                 if (r < 0)
1328                         goto err_remove_host;
1329         }
1330
1331         if (slot->pdata->get_cover_state != NULL) {
1332                 r = device_create_file(&mmc->class_dev,
1333                                         &dev_attr_cover_switch);
1334                 if (r < 0)
1335                         goto err_remove_slot_name;
1336                 tasklet_schedule(&slot->cover_tasklet);
1337         }
1338
1339         return 0;
1340
1341 err_remove_slot_name:
1342         if (slot->pdata->name != NULL)
1343                 device_remove_file(&mmc->class_dev, &dev_attr_slot_name);
1344 err_remove_host:
1345         mmc_remove_host(mmc);
1346         mmc_free_host(mmc);
1347         return r;
1348 }
1349
1350 static void mmc_omap_remove_slot(struct mmc_omap_slot *slot)
1351 {
1352         struct mmc_host *mmc = slot->mmc;
1353
1354         if (slot->pdata->name != NULL)
1355                 device_remove_file(&mmc->class_dev, &dev_attr_slot_name);
1356         if (slot->pdata->get_cover_state != NULL)
1357                 device_remove_file(&mmc->class_dev, &dev_attr_cover_switch);
1358
1359         tasklet_kill(&slot->cover_tasklet);
1360         del_timer_sync(&slot->cover_timer);
1361         flush_workqueue(slot->host->mmc_omap_wq);
1362
1363         mmc_remove_host(mmc);
1364         mmc_free_host(mmc);
1365 }
1366
1367 static int mmc_omap_probe(struct platform_device *pdev)
1368 {
1369         struct omap_mmc_platform_data *pdata = pdev->dev.platform_data;
1370         struct mmc_omap_host *host = NULL;
1371         struct resource *res;
1372         int i, ret = 0;
1373         int irq;
1374
1375         if (pdata == NULL) {
1376                 dev_err(&pdev->dev, "platform data missing\n");
1377                 return -ENXIO;
1378         }
1379         if (pdata->nr_slots == 0) {
1380                 dev_err(&pdev->dev, "no slots\n");
1381                 return -EPROBE_DEFER;
1382         }
1383
1384         host = devm_kzalloc(&pdev->dev, sizeof(struct mmc_omap_host),
1385                             GFP_KERNEL);
1386         if (host == NULL)
1387                 return -ENOMEM;
1388
1389         irq = platform_get_irq(pdev, 0);
1390         if (irq < 0)
1391                 return irq;
1392
1393         host->virt_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1394         if (IS_ERR(host->virt_base))
1395                 return PTR_ERR(host->virt_base);
1396
1397         INIT_WORK(&host->slot_release_work, mmc_omap_slot_release_work);
1398         INIT_WORK(&host->send_stop_work, mmc_omap_send_stop_work);
1399
1400         INIT_WORK(&host->cmd_abort_work, mmc_omap_abort_command);
1401         timer_setup(&host->cmd_abort_timer, mmc_omap_cmd_timer, 0);
1402
1403         spin_lock_init(&host->clk_lock);
1404         timer_setup(&host->clk_timer, mmc_omap_clk_timer, 0);
1405
1406         spin_lock_init(&host->dma_lock);
1407         spin_lock_init(&host->slot_lock);
1408         init_waitqueue_head(&host->slot_wq);
1409
1410         host->pdata = pdata;
1411         host->features = host->pdata->slots[0].features;
1412         host->dev = &pdev->dev;
1413         platform_set_drvdata(pdev, host);
1414
1415         host->slot_switch = devm_gpiod_get_optional(host->dev, "switch",
1416                                                     GPIOD_OUT_LOW);
1417         if (IS_ERR(host->slot_switch))
1418                 return dev_err_probe(host->dev, PTR_ERR(host->slot_switch),
1419                                      "error looking up slot switch GPIO\n");
1420
1421         host->id = pdev->id;
1422         host->irq = irq;
1423         host->phys_base = res->start;
1424         host->iclk = clk_get(&pdev->dev, "ick");
1425         if (IS_ERR(host->iclk))
1426                 return PTR_ERR(host->iclk);
1427         clk_prepare_enable(host->iclk);
1428
1429         host->fclk = clk_get(&pdev->dev, "fck");
1430         if (IS_ERR(host->fclk)) {
1431                 ret = PTR_ERR(host->fclk);
1432                 goto err_free_iclk;
1433         }
1434
1435         ret = clk_prepare(host->fclk);
1436         if (ret)
1437                 goto err_put_fclk;
1438
1439         host->dma_tx_burst = -1;
1440         host->dma_rx_burst = -1;
1441
1442         host->dma_tx = dma_request_chan(&pdev->dev, "tx");
1443         if (IS_ERR(host->dma_tx)) {
1444                 ret = PTR_ERR(host->dma_tx);
1445                 if (ret == -EPROBE_DEFER)
1446                         goto err_free_fclk;
1447
1448                 host->dma_tx = NULL;
1449                 dev_warn(host->dev, "TX DMA channel request failed\n");
1450         }
1451
1452         host->dma_rx = dma_request_chan(&pdev->dev, "rx");
1453         if (IS_ERR(host->dma_rx)) {
1454                 ret = PTR_ERR(host->dma_rx);
1455                 if (ret == -EPROBE_DEFER) {
1456                         if (host->dma_tx)
1457                                 dma_release_channel(host->dma_tx);
1458                         goto err_free_fclk;
1459                 }
1460
1461                 host->dma_rx = NULL;
1462                 dev_warn(host->dev, "RX DMA channel request failed\n");
1463         }
1464
1465         ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1466         if (ret)
1467                 goto err_free_dma;
1468
1469         if (pdata->init != NULL) {
1470                 ret = pdata->init(&pdev->dev);
1471                 if (ret < 0)
1472                         goto err_free_irq;
1473         }
1474
1475         host->nr_slots = pdata->nr_slots;
1476         host->reg_shift = (mmc_omap7xx() ? 1 : 2);
1477
1478         host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);
1479         if (!host->mmc_omap_wq) {
1480                 ret = -ENOMEM;
1481                 goto err_plat_cleanup;
1482         }
1483
1484         for (i = 0; i < pdata->nr_slots; i++) {
1485                 ret = mmc_omap_new_slot(host, i);
1486                 if (ret < 0) {
1487                         while (--i >= 0)
1488                                 mmc_omap_remove_slot(host->slots[i]);
1489
1490                         goto err_destroy_wq;
1491                 }
1492         }
1493
1494         return 0;
1495
1496 err_destroy_wq:
1497         destroy_workqueue(host->mmc_omap_wq);
1498 err_plat_cleanup:
1499         if (pdata->cleanup)
1500                 pdata->cleanup(&pdev->dev);
1501 err_free_irq:
1502         free_irq(host->irq, host);
1503 err_free_dma:
1504         if (host->dma_tx)
1505                 dma_release_channel(host->dma_tx);
1506         if (host->dma_rx)
1507                 dma_release_channel(host->dma_rx);
1508 err_free_fclk:
1509         clk_unprepare(host->fclk);
1510 err_put_fclk:
1511         clk_put(host->fclk);
1512 err_free_iclk:
1513         clk_disable_unprepare(host->iclk);
1514         clk_put(host->iclk);
1515         return ret;
1516 }
1517
1518 static void mmc_omap_remove(struct platform_device *pdev)
1519 {
1520         struct mmc_omap_host *host = platform_get_drvdata(pdev);
1521         int i;
1522
1523         BUG_ON(host == NULL);
1524
1525         for (i = 0; i < host->nr_slots; i++)
1526                 mmc_omap_remove_slot(host->slots[i]);
1527
1528         if (host->pdata->cleanup)
1529                 host->pdata->cleanup(&pdev->dev);
1530
1531         mmc_omap_fclk_enable(host, 0);
1532         free_irq(host->irq, host);
1533         clk_unprepare(host->fclk);
1534         clk_put(host->fclk);
1535         clk_disable_unprepare(host->iclk);
1536         clk_put(host->iclk);
1537
1538         if (host->dma_tx)
1539                 dma_release_channel(host->dma_tx);
1540         if (host->dma_rx)
1541                 dma_release_channel(host->dma_rx);
1542
1543         destroy_workqueue(host->mmc_omap_wq);
1544 }
1545
1546 #if IS_BUILTIN(CONFIG_OF)
1547 static const struct of_device_id mmc_omap_match[] = {
1548         { .compatible = "ti,omap2420-mmc", },
1549         { },
1550 };
1551 MODULE_DEVICE_TABLE(of, mmc_omap_match);
1552 #endif
1553
1554 static struct platform_driver mmc_omap_driver = {
1555         .probe          = mmc_omap_probe,
1556         .remove_new     = mmc_omap_remove,
1557         .driver         = {
1558                 .name   = DRIVER_NAME,
1559                 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1560                 .of_match_table = of_match_ptr(mmc_omap_match),
1561         },
1562 };
1563
1564 module_platform_driver(mmc_omap_driver);
1565 MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1566 MODULE_LICENSE("GPL");
1567 MODULE_ALIAS("platform:" DRIVER_NAME);
1568 MODULE_AUTHOR("Juha Yrjölä");