1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */
5 #include <linux/vmalloc.h>
9 static BLOCKING_NOTIFIER_HEAD(pds_notify_chain);
11 int pdsc_register_notify(struct notifier_block *nb)
13 return blocking_notifier_chain_register(&pds_notify_chain, nb);
15 EXPORT_SYMBOL_GPL(pdsc_register_notify);
17 void pdsc_unregister_notify(struct notifier_block *nb)
19 blocking_notifier_chain_unregister(&pds_notify_chain, nb);
21 EXPORT_SYMBOL_GPL(pdsc_unregister_notify);
23 void pdsc_notify(unsigned long event, void *data)
25 blocking_notifier_call_chain(&pds_notify_chain, event, data);
28 void pdsc_intr_free(struct pdsc *pdsc, int index)
30 struct pdsc_intr_info *intr_info;
32 if (index >= pdsc->nintrs || index < 0) {
33 WARN(true, "bad intr index %d\n", index);
37 intr_info = &pdsc->intr_info[index];
38 if (!intr_info->vector)
40 dev_dbg(pdsc->dev, "%s: idx %d vec %d name %s\n",
41 __func__, index, intr_info->vector, intr_info->name);
43 pds_core_intr_mask(&pdsc->intr_ctrl[index], PDS_CORE_INTR_MASK_SET);
44 pds_core_intr_clean(&pdsc->intr_ctrl[index]);
46 free_irq(intr_info->vector, intr_info->data);
48 memset(intr_info, 0, sizeof(*intr_info));
51 int pdsc_intr_alloc(struct pdsc *pdsc, char *name,
52 irq_handler_t handler, void *data)
54 struct pdsc_intr_info *intr_info;
58 /* Find the first available interrupt */
59 for (index = 0; index < pdsc->nintrs; index++)
60 if (!pdsc->intr_info[index].vector)
62 if (index >= pdsc->nintrs) {
63 dev_warn(pdsc->dev, "%s: no intr, index=%d nintrs=%d\n",
64 __func__, index, pdsc->nintrs);
68 pds_core_intr_clean_flags(&pdsc->intr_ctrl[index],
69 PDS_CORE_INTR_CRED_RESET_COALESCE);
71 intr_info = &pdsc->intr_info[index];
73 intr_info->index = index;
74 intr_info->data = data;
75 strscpy(intr_info->name, name, sizeof(intr_info->name));
77 /* Get the OS vector number for the interrupt */
78 err = pci_irq_vector(pdsc->pdev, index);
80 dev_err(pdsc->dev, "failed to get intr vector index %d: %pe\n",
82 goto err_out_free_intr;
84 intr_info->vector = err;
86 /* Init the device's intr mask */
87 pds_core_intr_clean(&pdsc->intr_ctrl[index]);
88 pds_core_intr_mask_assert(&pdsc->intr_ctrl[index], 1);
89 pds_core_intr_mask(&pdsc->intr_ctrl[index], PDS_CORE_INTR_MASK_SET);
91 /* Register the isr with a name */
92 err = request_irq(intr_info->vector, handler, 0, intr_info->name, data);
94 dev_err(pdsc->dev, "failed to get intr irq vector %d: %pe\n",
95 intr_info->vector, ERR_PTR(err));
96 goto err_out_free_intr;
102 pdsc_intr_free(pdsc, index);
106 static void pdsc_qcq_intr_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)
108 if (!(qcq->flags & PDS_CORE_QCQ_F_INTR) ||
109 qcq->intx == PDS_CORE_INTR_INDEX_NOT_ASSIGNED)
112 pdsc_intr_free(pdsc, qcq->intx);
113 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;
116 static int pdsc_qcq_intr_alloc(struct pdsc *pdsc, struct pdsc_qcq *qcq)
118 char name[PDSC_INTR_NAME_MAX_SZ];
121 if (!(qcq->flags & PDS_CORE_QCQ_F_INTR)) {
122 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;
126 snprintf(name, sizeof(name), "%s-%d-%s",
127 PDS_CORE_DRV_NAME, pdsc->pdev->bus->number, qcq->q.name);
128 index = pdsc_intr_alloc(pdsc, name, pdsc_adminq_isr, qcq);
136 void pdsc_qcq_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)
138 struct device *dev = pdsc->dev;
140 if (!(qcq && qcq->pdsc))
143 pdsc_debugfs_del_qcq(qcq);
145 pdsc_qcq_intr_free(pdsc, qcq);
148 dma_free_coherent(dev, qcq->q_size,
149 qcq->q_base, qcq->q_base_pa);
152 dma_free_coherent(dev, qcq->cq_size,
153 qcq->cq_base, qcq->cq_base_pa);
161 memset(qcq, 0, sizeof(*qcq));
164 static void pdsc_q_map(struct pdsc_queue *q, void *base, dma_addr_t base_pa)
166 struct pdsc_q_info *cur;
170 q->base_pa = base_pa;
172 for (i = 0, cur = q->info; i < q->num_descs; i++, cur++)
173 cur->desc = base + (i * q->desc_size);
176 static void pdsc_cq_map(struct pdsc_cq *cq, void *base, dma_addr_t base_pa)
178 struct pdsc_cq_info *cur;
182 cq->base_pa = base_pa;
184 for (i = 0, cur = cq->info; i < cq->num_descs; i++, cur++)
185 cur->comp = base + (i * cq->desc_size);
188 int pdsc_qcq_alloc(struct pdsc *pdsc, unsigned int type, unsigned int index,
189 const char *name, unsigned int flags, unsigned int num_descs,
190 unsigned int desc_size, unsigned int cq_desc_size,
191 unsigned int pid, struct pdsc_qcq *qcq)
193 struct device *dev = pdsc->dev;
194 void *q_base, *cq_base;
195 dma_addr_t cq_base_pa;
196 dma_addr_t q_base_pa;
199 qcq->q.info = vcalloc(num_descs, sizeof(*qcq->q.info));
207 INIT_WORK(&qcq->work, pdsc_work_thread);
210 qcq->q.index = index;
211 qcq->q.num_descs = num_descs;
212 qcq->q.desc_size = desc_size;
216 snprintf(qcq->q.name, sizeof(qcq->q.name), "%s%u", name, index);
218 err = pdsc_qcq_intr_alloc(pdsc, qcq);
220 goto err_out_free_q_info;
222 qcq->cq.info = vcalloc(num_descs, sizeof(*qcq->cq.info));
225 goto err_out_free_irq;
228 qcq->cq.bound_intr = &pdsc->intr_info[qcq->intx];
229 qcq->cq.num_descs = num_descs;
230 qcq->cq.desc_size = cq_desc_size;
231 qcq->cq.tail_idx = 0;
232 qcq->cq.done_color = 1;
234 if (flags & PDS_CORE_QCQ_F_NOTIFYQ) {
235 /* q & cq need to be contiguous in case of notifyq */
236 qcq->q_size = PDS_PAGE_SIZE +
237 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE) +
238 ALIGN(num_descs * cq_desc_size, PDS_PAGE_SIZE);
239 qcq->q_base = dma_alloc_coherent(dev,
240 qcq->q_size + qcq->cq_size,
245 goto err_out_free_cq_info;
247 q_base = PTR_ALIGN(qcq->q_base, PDS_PAGE_SIZE);
248 q_base_pa = ALIGN(qcq->q_base_pa, PDS_PAGE_SIZE);
249 pdsc_q_map(&qcq->q, q_base, q_base_pa);
251 cq_base = PTR_ALIGN(q_base +
252 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),
254 cq_base_pa = ALIGN(qcq->q_base_pa +
255 ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),
259 /* q DMA descriptors */
260 qcq->q_size = PDS_PAGE_SIZE + (num_descs * desc_size);
261 qcq->q_base = dma_alloc_coherent(dev, qcq->q_size,
266 goto err_out_free_cq_info;
268 q_base = PTR_ALIGN(qcq->q_base, PDS_PAGE_SIZE);
269 q_base_pa = ALIGN(qcq->q_base_pa, PDS_PAGE_SIZE);
270 pdsc_q_map(&qcq->q, q_base, q_base_pa);
272 /* cq DMA descriptors */
273 qcq->cq_size = PDS_PAGE_SIZE + (num_descs * cq_desc_size);
274 qcq->cq_base = dma_alloc_coherent(dev, qcq->cq_size,
281 cq_base = PTR_ALIGN(qcq->cq_base, PDS_PAGE_SIZE);
282 cq_base_pa = ALIGN(qcq->cq_base_pa, PDS_PAGE_SIZE);
285 pdsc_cq_map(&qcq->cq, cq_base, cq_base_pa);
286 qcq->cq.bound_q = &qcq->q;
288 pdsc_debugfs_add_qcq(pdsc, qcq);
293 dma_free_coherent(dev, qcq->q_size, qcq->q_base, qcq->q_base_pa);
294 err_out_free_cq_info:
297 pdsc_qcq_intr_free(pdsc, qcq);
300 memset(qcq, 0, sizeof(*qcq));
302 dev_err(dev, "qcq alloc of %s%d failed %d\n", name, index, err);
306 static int pdsc_core_init(struct pdsc *pdsc)
308 union pds_core_dev_comp comp = {};
309 union pds_core_dev_cmd cmd = {
310 .init.opcode = PDS_CORE_CMD_INIT,
312 struct pds_core_dev_init_data_out cido;
313 struct pds_core_dev_init_data_in cidi;
319 cidi.adminq_q_base = cpu_to_le64(pdsc->adminqcq.q_base_pa);
320 cidi.adminq_cq_base = cpu_to_le64(pdsc->adminqcq.cq_base_pa);
321 cidi.notifyq_cq_base = cpu_to_le64(pdsc->notifyqcq.cq.base_pa);
322 cidi.flags = cpu_to_le32(PDS_CORE_QINIT_F_IRQ | PDS_CORE_QINIT_F_ENA);
323 cidi.intr_index = cpu_to_le16(pdsc->adminqcq.intx);
324 cidi.adminq_ring_size = ilog2(pdsc->adminqcq.q.num_descs);
325 cidi.notifyq_ring_size = ilog2(pdsc->notifyqcq.q.num_descs);
327 mutex_lock(&pdsc->devcmd_lock);
329 sz = min_t(size_t, sizeof(cidi), sizeof(pdsc->cmd_regs->data));
330 memcpy_toio(&pdsc->cmd_regs->data, &cidi, sz);
332 err = pdsc_devcmd_locked(pdsc, &cmd, &comp, pdsc->devcmd_timeout);
334 sz = min_t(size_t, sizeof(cido), sizeof(pdsc->cmd_regs->data));
335 memcpy_fromio(&cido, &pdsc->cmd_regs->data, sz);
338 mutex_unlock(&pdsc->devcmd_lock);
340 dev_err(pdsc->dev, "Device init command failed: %pe\n",
345 pdsc->hw_index = le32_to_cpu(cido.core_hw_index);
347 dbid_count = le32_to_cpu(pdsc->dev_ident.ndbpgs_per_lif);
348 dbpage_num = pdsc->hw_index * dbid_count;
349 pdsc->kern_dbpage = pdsc_map_dbpage(pdsc, dbpage_num);
350 if (!pdsc->kern_dbpage) {
351 dev_err(pdsc->dev, "Cannot map dbpage, aborting\n");
355 pdsc->adminqcq.q.hw_type = cido.adminq_hw_type;
356 pdsc->adminqcq.q.hw_index = le32_to_cpu(cido.adminq_hw_index);
357 pdsc->adminqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc->adminqcq.q.hw_index);
359 pdsc->notifyqcq.q.hw_type = cido.notifyq_hw_type;
360 pdsc->notifyqcq.q.hw_index = le32_to_cpu(cido.notifyq_hw_index);
361 pdsc->notifyqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc->notifyqcq.q.hw_index);
368 static struct pdsc_viftype pdsc_viftype_defaults[] = {
369 [PDS_DEV_TYPE_VDPA] = { .name = PDS_DEV_TYPE_VDPA_STR,
370 .vif_id = PDS_DEV_TYPE_VDPA,
371 .dl_id = DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET },
372 [PDS_DEV_TYPE_MAX] = {}
375 static int pdsc_viftypes_init(struct pdsc *pdsc)
377 enum pds_core_vif_types vt;
379 pdsc->viftype_status = kzalloc(sizeof(pdsc_viftype_defaults),
381 if (!pdsc->viftype_status)
384 for (vt = 0; vt < PDS_DEV_TYPE_MAX; vt++) {
387 if (!pdsc_viftype_defaults[vt].name)
390 /* Grab the defaults */
391 pdsc->viftype_status[vt] = pdsc_viftype_defaults[vt];
393 /* See what the Core device has for support */
394 vt_support = !!le16_to_cpu(pdsc->dev_ident.vif_types[vt]);
395 dev_dbg(pdsc->dev, "VIF %s is %ssupported\n",
396 pdsc->viftype_status[vt].name,
397 vt_support ? "" : "not ");
399 pdsc->viftype_status[vt].supported = vt_support;
405 int pdsc_setup(struct pdsc *pdsc, bool init)
411 err = pdsc_dev_init(pdsc);
413 err = pdsc_dev_reinit(pdsc);
417 /* Scale the descriptor ring length based on number of CPUs and VFs */
418 numdescs = max_t(int, PDSC_ADMINQ_MIN_LENGTH, num_online_cpus());
419 numdescs += 2 * pci_sriov_get_totalvfs(pdsc->pdev);
420 numdescs = roundup_pow_of_two(numdescs);
421 err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_ADMINQ, 0, "adminq",
422 PDS_CORE_QCQ_F_CORE | PDS_CORE_QCQ_F_INTR,
424 sizeof(union pds_core_adminq_cmd),
425 sizeof(union pds_core_adminq_comp),
428 goto err_out_teardown;
430 err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_NOTIFYQ, 0, "notifyq",
431 PDS_CORE_QCQ_F_NOTIFYQ,
433 sizeof(struct pds_core_notifyq_cmd),
434 sizeof(union pds_core_notifyq_comp),
435 0, &pdsc->notifyqcq);
437 goto err_out_teardown;
439 /* NotifyQ rides on the AdminQ interrupt */
440 pdsc->notifyqcq.intx = pdsc->adminqcq.intx;
442 /* Set up the Core with the AdminQ and NotifyQ info */
443 err = pdsc_core_init(pdsc);
445 goto err_out_teardown;
447 /* Set up the VIFs */
449 err = pdsc_viftypes_init(pdsc);
451 goto err_out_teardown;
453 pdsc_debugfs_add_viftype(pdsc);
456 clear_bit(PDSC_S_FW_DEAD, &pdsc->state);
460 pdsc_teardown(pdsc, init);
464 void pdsc_teardown(struct pdsc *pdsc, bool removing)
468 if (!pdsc->pdev->is_virtfn)
469 pdsc_devcmd_reset(pdsc);
470 pdsc_qcq_free(pdsc, &pdsc->notifyqcq);
471 pdsc_qcq_free(pdsc, &pdsc->adminqcq);
474 kfree(pdsc->viftype_status);
475 pdsc->viftype_status = NULL;
478 if (pdsc->intr_info) {
479 for (i = 0; i < pdsc->nintrs; i++)
480 pdsc_intr_free(pdsc, i);
483 kfree(pdsc->intr_info);
484 pdsc->intr_info = NULL;
488 if (pdsc->kern_dbpage) {
489 iounmap(pdsc->kern_dbpage);
490 pdsc->kern_dbpage = NULL;
493 set_bit(PDSC_S_FW_DEAD, &pdsc->state);
496 int pdsc_start(struct pdsc *pdsc)
498 pds_core_intr_mask(&pdsc->intr_ctrl[pdsc->adminqcq.intx],
499 PDS_CORE_INTR_MASK_CLEAR);
504 void pdsc_stop(struct pdsc *pdsc)
508 if (!pdsc->intr_info)
511 /* Mask interrupts that are in use */
512 for (i = 0; i < pdsc->nintrs; i++)
513 if (pdsc->intr_info[i].vector)
514 pds_core_intr_mask(&pdsc->intr_ctrl[i],
515 PDS_CORE_INTR_MASK_SET);
518 static void pdsc_fw_down(struct pdsc *pdsc)
520 union pds_core_notifyq_comp reset_event = {
521 .reset.ecode = cpu_to_le16(PDS_EVENT_RESET),
525 if (test_and_set_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
526 dev_err(pdsc->dev, "%s: already happening\n", __func__);
530 /* Notify clients of fw_down */
531 if (pdsc->fw_reporter)
532 devlink_health_report(pdsc->fw_reporter, "FW down reported", pdsc);
533 pdsc_notify(PDS_EVENT_RESET, &reset_event);
536 pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);
539 static void pdsc_fw_up(struct pdsc *pdsc)
541 union pds_core_notifyq_comp reset_event = {
542 .reset.ecode = cpu_to_le16(PDS_EVENT_RESET),
547 if (!test_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
548 dev_err(pdsc->dev, "%s: fw not dead\n", __func__);
552 err = pdsc_setup(pdsc, PDSC_SETUP_RECOVERY);
556 err = pdsc_start(pdsc);
560 /* Notify clients of fw_up */
561 pdsc->fw_recoveries++;
562 if (pdsc->fw_reporter)
563 devlink_health_reporter_state_update(pdsc->fw_reporter,
564 DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);
565 pdsc_notify(PDS_EVENT_RESET, &reset_event);
570 pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);
573 void pdsc_health_thread(struct work_struct *work)
575 struct pdsc *pdsc = container_of(work, struct pdsc, health_work);
579 mutex_lock(&pdsc->config_lock);
581 /* Don't do a check when in a transition state */
582 mask = BIT_ULL(PDSC_S_INITING_DRIVER) |
583 BIT_ULL(PDSC_S_STOPPING_DRIVER);
584 if (pdsc->state & mask)
587 healthy = pdsc_is_fw_good(pdsc);
588 dev_dbg(pdsc->dev, "%s: health %d fw_status %#02x fw_heartbeat %d\n",
589 __func__, healthy, pdsc->fw_status, pdsc->last_hb);
591 if (test_bit(PDSC_S_FW_DEAD, &pdsc->state)) {
599 pdsc->fw_generation = pdsc->fw_status & PDS_CORE_FW_STS_F_GENERATION;
602 mutex_unlock(&pdsc->config_lock);