drivers/nvme/host/core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * NVM Express device driver
   4  * Copyright (c) 2011-2014, Intel Corporation.
   5  */
   6
   7 #include <linux/blkdev.h>
   8 #include <linux/blk-mq.h>
   9 #include <linux/blk-integrity.h>
  10 #include <linux/compat.h>
  11 #include <linux/delay.h>
  12 #include <linux/errno.h>
  13 #include <linux/hdreg.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/backing-dev.h>
  17 #include <linux/slab.h>
  18 #include <linux/types.h>
  19 #include <linux/pr.h>
  20 #include <linux/ptrace.h>
  21 #include <linux/nvme_ioctl.h>
  22 #include <linux/pm_qos.h>
  23 #include <linux/ratelimit.h>
  24 #include <asm/unaligned.h>
  25
  26 #include "nvme.h"
  27 #include "fabrics.h"
  28 #include <linux/nvme-auth.h>
  29
  30 #define CREATE_TRACE_POINTS
  31 #include "trace.h"
  32
  33 #define NVME_MINORS             (1U << MINORBITS)
  34
  35 struct nvme_ns_info {
  36         struct nvme_ns_ids ids;
  37         u32 nsid;
  38         __le32 anagrpid;
  39         bool is_shared;
  40         bool is_readonly;
  41         bool is_ready;
  42         bool is_removed;
  43 };
  44
  45 unsigned int admin_timeout = 60;
  46 module_param(admin_timeout, uint, 0644);
  47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  48 EXPORT_SYMBOL_GPL(admin_timeout);
  49
  50 unsigned int nvme_io_timeout = 30;
  51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
  52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  53 EXPORT_SYMBOL_GPL(nvme_io_timeout);
  54
  55 static unsigned char shutdown_timeout = 5;
  56 module_param(shutdown_timeout, byte, 0644);
  57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  58
  59 static u8 nvme_max_retries = 5;
  60 module_param_named(max_retries, nvme_max_retries, byte, 0644);
  61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  62
  63 static unsigned long default_ps_max_latency_us = 100000;
  64 module_param(default_ps_max_latency_us, ulong, 0644);
  65 MODULE_PARM_DESC(default_ps_max_latency_us,
  66                  "max power saving latency for new devices; use PM QOS to change per device");
  67
  68 static bool force_apst;
  69 module_param(force_apst, bool, 0644);
  70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  71
  72 static unsigned long apst_primary_timeout_ms = 100;
  73 module_param(apst_primary_timeout_ms, ulong, 0644);
  74 MODULE_PARM_DESC(apst_primary_timeout_ms,
  75         "primary APST timeout in ms");
  76
  77 static unsigned long apst_secondary_timeout_ms = 2000;
  78 module_param(apst_secondary_timeout_ms, ulong, 0644);
  79 MODULE_PARM_DESC(apst_secondary_timeout_ms,
  80         "secondary APST timeout in ms");
  81
  82 static unsigned long apst_primary_latency_tol_us = 15000;
  83 module_param(apst_primary_latency_tol_us, ulong, 0644);
  84 MODULE_PARM_DESC(apst_primary_latency_tol_us,
  85         "primary APST latency tolerance in us");
  86
  87 static unsigned long apst_secondary_latency_tol_us = 100000;
  88 module_param(apst_secondary_latency_tol_us, ulong, 0644);
  89 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
  90         "secondary APST latency tolerance in us");
  91
  92 /*
  93  * nvme_wq - hosts nvme related works that are not reset or delete
  94  * nvme_reset_wq - hosts nvme reset works
  95  * nvme_delete_wq - hosts nvme delete works
  96  *
  97  * nvme_wq will host works such as scan, aen handling, fw activation,
  98  * keep-alive, periodic reconnects etc. nvme_reset_wq
  99  * runs reset works which also flush works hosted on nvme_wq for
 100  * serialization purposes. nvme_delete_wq host controller deletion
 101  * works which flush reset works for serialization.
 102  */
 103 struct workqueue_struct *nvme_wq;
 104 EXPORT_SYMBOL_GPL(nvme_wq);
 105
 106 struct workqueue_struct *nvme_reset_wq;
 107 EXPORT_SYMBOL_GPL(nvme_reset_wq);
 108
 109 struct workqueue_struct *nvme_delete_wq;
 110 EXPORT_SYMBOL_GPL(nvme_delete_wq);
 111
 112 static LIST_HEAD(nvme_subsystems);
 113 static DEFINE_MUTEX(nvme_subsystems_lock);
 114
 115 static DEFINE_IDA(nvme_instance_ida);
 116 static dev_t nvme_ctrl_base_chr_devt;
 117 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
 118 static const struct class nvme_class = {
 119         .name = "nvme",
 120         .dev_uevent = nvme_class_uevent,
 121 };
 122
 123 static const struct class nvme_subsys_class = {
 124         .name = "nvme-subsystem",
 125 };
 126
 127 static DEFINE_IDA(nvme_ns_chr_minor_ida);
 128 static dev_t nvme_ns_chr_devt;
 129 static const struct class nvme_ns_chr_class = {
 130         .name = "nvme-generic",
 131 };
 132
 133 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
 134 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
 135                                            unsigned nsid);
 136 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
 137                                    struct nvme_command *cmd);
 138
 139 void nvme_queue_scan(struct nvme_ctrl *ctrl)
 140 {
 141         /*
 142          * Only new queue scan work when admin and IO queues are both alive
 143          */
 144         if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
 145                 queue_work(nvme_wq, &ctrl->scan_work);
 146 }
 147
 148 /*
 149  * Use this function to proceed with scheduling reset_work for a controller
 150  * that had previously been set to the resetting state. This is intended for
 151  * code paths that can't be interrupted by other reset attempts. A hot removal
 152  * may prevent this from succeeding.
 153  */
 154 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
 155 {
 156         if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
 157                 return -EBUSY;
 158         if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
 159                 return -EBUSY;
 160         return 0;
 161 }
 162 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
 163
 164 static void nvme_failfast_work(struct work_struct *work)
 165 {
 166         struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
 167                         struct nvme_ctrl, failfast_work);
 168
 169         if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
 170                 return;
 171
 172         set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
 173         dev_info(ctrl->device, "failfast expired\n");
 174         nvme_kick_requeue_lists(ctrl);
 175 }
 176
 177 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
 178 {
 179         if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
 180                 return;
 181
 182         schedule_delayed_work(&ctrl->failfast_work,
 183                               ctrl->opts->fast_io_fail_tmo * HZ);
 184 }
 185
 186 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
 187 {
 188         if (!ctrl->opts)
 189                 return;
 190
 191         cancel_delayed_work_sync(&ctrl->failfast_work);
 192         clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
 193 }
 194
 195
 196 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
 197 {
 198         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
 199                 return -EBUSY;
 200         if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
 201                 return -EBUSY;
 202         return 0;
 203 }
 204 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
 205
 206 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
 207 {
 208         int ret;
 209
 210         ret = nvme_reset_ctrl(ctrl);
 211         if (!ret) {
 212                 flush_work(&ctrl->reset_work);
 213                 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
 214                         ret = -ENETRESET;
 215         }
 216
 217         return ret;
 218 }
 219
 220 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
 221 {
 222         dev_info(ctrl->device,
 223                  "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
 224
 225         flush_work(&ctrl->reset_work);
 226         nvme_stop_ctrl(ctrl);
 227         nvme_remove_namespaces(ctrl);
 228         ctrl->ops->delete_ctrl(ctrl);
 229         nvme_uninit_ctrl(ctrl);
 230 }
 231
 232 static void nvme_delete_ctrl_work(struct work_struct *work)
 233 {
 234         struct nvme_ctrl *ctrl =
 235                 container_of(work, struct nvme_ctrl, delete_work);
 236
 237         nvme_do_delete_ctrl(ctrl);
 238 }
 239
 240 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
 241 {
 242         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
 243                 return -EBUSY;
 244         if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
 245                 return -EBUSY;
 246         return 0;
 247 }
 248 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
 249
 250 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
 251 {
 252         /*
 253          * Keep a reference until nvme_do_delete_ctrl() complete,
 254          * since ->delete_ctrl can free the controller.
 255          */
 256         nvme_get_ctrl(ctrl);
 257         if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
 258                 nvme_do_delete_ctrl(ctrl);
 259         nvme_put_ctrl(ctrl);
 260 }
 261
 262 static blk_status_t nvme_error_status(u16 status)
 263 {
 264         switch (status & 0x7ff) {
 265         case NVME_SC_SUCCESS:
 266                 return BLK_STS_OK;
 267         case NVME_SC_CAP_EXCEEDED:
 268                 return BLK_STS_NOSPC;
 269         case NVME_SC_LBA_RANGE:
 270         case NVME_SC_CMD_INTERRUPTED:
 271         case NVME_SC_NS_NOT_READY:
 272                 return BLK_STS_TARGET;
 273         case NVME_SC_BAD_ATTRIBUTES:
 274         case NVME_SC_ONCS_NOT_SUPPORTED:
 275         case NVME_SC_INVALID_OPCODE:
 276         case NVME_SC_INVALID_FIELD:
 277         case NVME_SC_INVALID_NS:
 278                 return BLK_STS_NOTSUPP;
 279         case NVME_SC_WRITE_FAULT:
 280         case NVME_SC_READ_ERROR:
 281         case NVME_SC_UNWRITTEN_BLOCK:
 282         case NVME_SC_ACCESS_DENIED:
 283         case NVME_SC_READ_ONLY:
 284         case NVME_SC_COMPARE_FAILED:
 285                 return BLK_STS_MEDIUM;
 286         case NVME_SC_GUARD_CHECK:
 287         case NVME_SC_APPTAG_CHECK:
 288         case NVME_SC_REFTAG_CHECK:
 289         case NVME_SC_INVALID_PI:
 290                 return BLK_STS_PROTECTION;
 291         case NVME_SC_RESERVATION_CONFLICT:
 292                 return BLK_STS_RESV_CONFLICT;
 293         case NVME_SC_HOST_PATH_ERROR:
 294                 return BLK_STS_TRANSPORT;
 295         case NVME_SC_ZONE_TOO_MANY_ACTIVE:
 296                 return BLK_STS_ZONE_ACTIVE_RESOURCE;
 297         case NVME_SC_ZONE_TOO_MANY_OPEN:
 298                 return BLK_STS_ZONE_OPEN_RESOURCE;
 299         default:
 300                 return BLK_STS_IOERR;
 301         }
 302 }
 303
 304 static void nvme_retry_req(struct request *req)
 305 {
 306         unsigned long delay = 0;
 307         u16 crd;
 308
 309         /* The mask and shift result must be <= 3 */
 310         crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
 311         if (crd)
 312                 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
 313
 314         nvme_req(req)->retries++;
 315         blk_mq_requeue_request(req, false);
 316         blk_mq_delay_kick_requeue_list(req->q, delay);
 317 }
 318
 319 static void nvme_log_error(struct request *req)
 320 {
 321         struct nvme_ns *ns = req->q->queuedata;
 322         struct nvme_request *nr = nvme_req(req);
 323
 324         if (ns) {
 325                 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
 326                        ns->disk ? ns->disk->disk_name : "?",
 327                        nvme_get_opcode_str(nr->cmd->common.opcode),
 328                        nr->cmd->common.opcode,
 329                        nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
 330                        blk_rq_bytes(req) >> ns->head->lba_shift,
 331                        nvme_get_error_status_str(nr->status),
 332                        nr->status >> 8 & 7,     /* Status Code Type */
 333                        nr->status & 0xff,       /* Status Code */
 334                        nr->status & NVME_SC_MORE ? "MORE " : "",
 335                        nr->status & NVME_SC_DNR  ? "DNR "  : "");
 336                 return;
 337         }
 338
 339         pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
 340                            dev_name(nr->ctrl->device),
 341                            nvme_get_admin_opcode_str(nr->cmd->common.opcode),
 342                            nr->cmd->common.opcode,
 343                            nvme_get_error_status_str(nr->status),
 344                            nr->status >> 8 & 7, /* Status Code Type */
 345                            nr->status & 0xff,   /* Status Code */
 346                            nr->status & NVME_SC_MORE ? "MORE " : "",
 347                            nr->status & NVME_SC_DNR  ? "DNR "  : "");
 348 }
 349
 350 static void nvme_log_err_passthru(struct request *req)
 351 {
 352         struct nvme_ns *ns = req->q->queuedata;
 353         struct nvme_request *nr = nvme_req(req);
 354
 355         pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
 356                 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
 357                 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
 358                 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
 359                      nvme_get_admin_opcode_str(nr->cmd->common.opcode),
 360                 nr->cmd->common.opcode,
 361                 nvme_get_error_status_str(nr->status),
 362                 nr->status >> 8 & 7,    /* Status Code Type */
 363                 nr->status & 0xff,      /* Status Code */
 364                 nr->status & NVME_SC_MORE ? "MORE " : "",
 365                 nr->status & NVME_SC_DNR  ? "DNR "  : "",
 366                 nr->cmd->common.cdw10,
 367                 nr->cmd->common.cdw11,
 368                 nr->cmd->common.cdw12,
 369                 nr->cmd->common.cdw13,
 370                 nr->cmd->common.cdw14,
 371                 nr->cmd->common.cdw14);
 372 }
 373
 374 enum nvme_disposition {
 375         COMPLETE,
 376         RETRY,
 377         FAILOVER,
 378         AUTHENTICATE,
 379 };
 380
 381 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
 382 {
 383         if (likely(nvme_req(req)->status == 0))
 384                 return COMPLETE;
 385
 386         if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
 387                 return AUTHENTICATE;
 388
 389         if (blk_noretry_request(req) ||
 390             (nvme_req(req)->status & NVME_SC_DNR) ||
 391             nvme_req(req)->retries >= nvme_max_retries)
 392                 return COMPLETE;
 393
 394         if (req->cmd_flags & REQ_NVME_MPATH) {
 395                 if (nvme_is_path_error(nvme_req(req)->status) ||
 396                     blk_queue_dying(req->q))
 397                         return FAILOVER;
 398         } else {
 399                 if (blk_queue_dying(req->q))
 400                         return COMPLETE;
 401         }
 402
 403         return RETRY;
 404 }
 405
 406 static inline void nvme_end_req_zoned(struct request *req)
 407 {
 408         if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
 409             req_op(req) == REQ_OP_ZONE_APPEND) {
 410                 struct nvme_ns *ns = req->q->queuedata;
 411
 412                 req->__sector = nvme_lba_to_sect(ns->head,
 413                         le64_to_cpu(nvme_req(req)->result.u64));
 414         }
 415 }
 416
 417 static inline void nvme_end_req(struct request *req)
 418 {
 419         blk_status_t status = nvme_error_status(nvme_req(req)->status);
 420
 421         if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
 422                 if (blk_rq_is_passthrough(req))
 423                         nvme_log_err_passthru(req);
 424                 else
 425                         nvme_log_error(req);
 426         }
 427         nvme_end_req_zoned(req);
 428         nvme_trace_bio_complete(req);
 429         if (req->cmd_flags & REQ_NVME_MPATH)
 430                 nvme_mpath_end_request(req);
 431         blk_mq_end_request(req, status);
 432 }
 433
 434 void nvme_complete_rq(struct request *req)
 435 {
 436         struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
 437
 438         trace_nvme_complete_rq(req);
 439         nvme_cleanup_cmd(req);
 440
 441         /*
 442          * Completions of long-running commands should not be able to
 443          * defer sending of periodic keep alives, since the controller
 444          * may have completed processing such commands a long time ago
 445          * (arbitrarily close to command submission time).
 446          * req->deadline - req->timeout is the command submission time
 447          * in jiffies.
 448          */
 449         if (ctrl->kas &&
 450             req->deadline - req->timeout >= ctrl->ka_last_check_time)
 451                 ctrl->comp_seen = true;
 452
 453         switch (nvme_decide_disposition(req)) {
 454         case COMPLETE:
 455                 nvme_end_req(req);
 456                 return;
 457         case RETRY:
 458                 nvme_retry_req(req);
 459                 return;
 460         case FAILOVER:
 461                 nvme_failover_req(req);
 462                 return;
 463         case AUTHENTICATE:
 464 #ifdef CONFIG_NVME_HOST_AUTH
 465                 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
 466                 nvme_retry_req(req);
 467 #else
 468                 nvme_end_req(req);
 469 #endif
 470                 return;
 471         }
 472 }
 473 EXPORT_SYMBOL_GPL(nvme_complete_rq);
 474
 475 void nvme_complete_batch_req(struct request *req)
 476 {
 477         trace_nvme_complete_rq(req);
 478         nvme_cleanup_cmd(req);
 479         nvme_end_req_zoned(req);
 480 }
 481 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
 482
 483 /*
 484  * Called to unwind from ->queue_rq on a failed command submission so that the
 485  * multipathing code gets called to potentially failover to another path.
 486  * The caller needs to unwind all transport specific resource allocations and
 487  * must return propagate the return value.
 488  */
 489 blk_status_t nvme_host_path_error(struct request *req)
 490 {
 491         nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
 492         blk_mq_set_request_complete(req);
 493         nvme_complete_rq(req);
 494         return BLK_STS_OK;
 495 }
 496 EXPORT_SYMBOL_GPL(nvme_host_path_error);
 497
 498 bool nvme_cancel_request(struct request *req, void *data)
 499 {
 500         dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
 501                                 "Cancelling I/O %d", req->tag);
 502
 503         /* don't abort one completed or idle request */
 504         if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
 505                 return true;
 506
 507         nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
 508         nvme_req(req)->flags |= NVME_REQ_CANCELLED;
 509         blk_mq_complete_request(req);
 510         return true;
 511 }
 512 EXPORT_SYMBOL_GPL(nvme_cancel_request);
 513
 514 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
 515 {
 516         if (ctrl->tagset) {
 517                 blk_mq_tagset_busy_iter(ctrl->tagset,
 518                                 nvme_cancel_request, ctrl);
 519                 blk_mq_tagset_wait_completed_request(ctrl->tagset);
 520         }
 521 }
 522 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
 523
 524 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
 525 {
 526         if (ctrl->admin_tagset) {
 527                 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
 528                                 nvme_cancel_request, ctrl);
 529                 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
 530         }
 531 }
 532 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
 533
 534 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 535                 enum nvme_ctrl_state new_state)
 536 {
 537         enum nvme_ctrl_state old_state;
 538         unsigned long flags;
 539         bool changed = false;
 540
 541         spin_lock_irqsave(&ctrl->lock, flags);
 542
 543         old_state = nvme_ctrl_state(ctrl);
 544         switch (new_state) {
 545         case NVME_CTRL_LIVE:
 546                 switch (old_state) {
 547                 case NVME_CTRL_NEW:
 548                 case NVME_CTRL_RESETTING:
 549                 case NVME_CTRL_CONNECTING:
 550                         changed = true;
 551                         fallthrough;
 552                 default:
 553                         break;
 554                 }
 555                 break;
 556         case NVME_CTRL_RESETTING:
 557                 switch (old_state) {
 558                 case NVME_CTRL_NEW:
 559                 case NVME_CTRL_LIVE:
 560                         changed = true;
 561                         fallthrough;
 562                 default:
 563                         break;
 564                 }
 565                 break;
 566         case NVME_CTRL_CONNECTING:
 567                 switch (old_state) {
 568                 case NVME_CTRL_NEW:
 569                 case NVME_CTRL_RESETTING:
 570                         changed = true;
 571                         fallthrough;
 572                 default:
 573                         break;
 574                 }
 575                 break;
 576         case NVME_CTRL_DELETING:
 577                 switch (old_state) {
 578                 case NVME_CTRL_LIVE:
 579                 case NVME_CTRL_RESETTING:
 580                 case NVME_CTRL_CONNECTING:
 581                         changed = true;
 582                         fallthrough;
 583                 default:
 584                         break;
 585                 }
 586                 break;
 587         case NVME_CTRL_DELETING_NOIO:
 588                 switch (old_state) {
 589                 case NVME_CTRL_DELETING:
 590                 case NVME_CTRL_DEAD:
 591                         changed = true;
 592                         fallthrough;
 593                 default:
 594                         break;
 595                 }
 596                 break;
 597         case NVME_CTRL_DEAD:
 598                 switch (old_state) {
 599                 case NVME_CTRL_DELETING:
 600                         changed = true;
 601                         fallthrough;
 602                 default:
 603                         break;
 604                 }
 605                 break;
 606         default:
 607                 break;
 608         }
 609
 610         if (changed) {
 611                 WRITE_ONCE(ctrl->state, new_state);
 612                 wake_up_all(&ctrl->state_wq);
 613         }
 614
 615         spin_unlock_irqrestore(&ctrl->lock, flags);
 616         if (!changed)
 617                 return false;
 618
 619         if (new_state == NVME_CTRL_LIVE) {
 620                 if (old_state == NVME_CTRL_CONNECTING)
 621                         nvme_stop_failfast_work(ctrl);
 622                 nvme_kick_requeue_lists(ctrl);
 623         } else if (new_state == NVME_CTRL_CONNECTING &&
 624                 old_state == NVME_CTRL_RESETTING) {
 625                 nvme_start_failfast_work(ctrl);
 626         }
 627         return changed;
 628 }
 629 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
 630
 631 /*
 632  * Returns true for sink states that can't ever transition back to live.
 633  */
 634 static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
 635 {
 636         switch (nvme_ctrl_state(ctrl)) {
 637         case NVME_CTRL_NEW:
 638         case NVME_CTRL_LIVE:
 639         case NVME_CTRL_RESETTING:
 640         case NVME_CTRL_CONNECTING:
 641                 return false;
 642         case NVME_CTRL_DELETING:
 643         case NVME_CTRL_DELETING_NOIO:
 644         case NVME_CTRL_DEAD:
 645                 return true;
 646         default:
 647                 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
 648                 return true;
 649         }
 650 }
 651
 652 /*
 653  * Waits for the controller state to be resetting, or returns false if it is
 654  * not possible to ever transition to that state.
 655  */
 656 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
 657 {
 658         wait_event(ctrl->state_wq,
 659                    nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
 660                    nvme_state_terminal(ctrl));
 661         return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
 662 }
 663 EXPORT_SYMBOL_GPL(nvme_wait_reset);
 664
 665 static void nvme_free_ns_head(struct kref *ref)
 666 {
 667         struct nvme_ns_head *head =
 668                 container_of(ref, struct nvme_ns_head, ref);
 669
 670         nvme_mpath_remove_disk(head);
 671         ida_free(&head->subsys->ns_ida, head->instance);
 672         cleanup_srcu_struct(&head->srcu);
 673         nvme_put_subsystem(head->subsys);
 674         kfree(head);
 675 }
 676
 677 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
 678 {
 679         return kref_get_unless_zero(&head->ref);
 680 }
 681
 682 void nvme_put_ns_head(struct nvme_ns_head *head)
 683 {
 684         kref_put(&head->ref, nvme_free_ns_head);
 685 }
 686
 687 static void nvme_free_ns(struct kref *kref)
 688 {
 689         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
 690
 691         put_disk(ns->disk);
 692         nvme_put_ns_head(ns->head);
 693         nvme_put_ctrl(ns->ctrl);
 694         kfree(ns);
 695 }
 696
 697 static inline bool nvme_get_ns(struct nvme_ns *ns)
 698 {
 699         return kref_get_unless_zero(&ns->kref);
 700 }
 701
 702 void nvme_put_ns(struct nvme_ns *ns)
 703 {
 704         kref_put(&ns->kref, nvme_free_ns);
 705 }
 706 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
 707
 708 static inline void nvme_clear_nvme_request(struct request *req)
 709 {
 710         nvme_req(req)->status = 0;
 711         nvme_req(req)->retries = 0;
 712         nvme_req(req)->flags = 0;
 713         req->rq_flags |= RQF_DONTPREP;
 714 }
 715
 716 /* initialize a passthrough request */
 717 void nvme_init_request(struct request *req, struct nvme_command *cmd)
 718 {
 719         struct nvme_request *nr = nvme_req(req);
 720         bool logging_enabled;
 721
 722         if (req->q->queuedata) {
 723                 struct nvme_ns *ns = req->q->disk->private_data;
 724
 725                 logging_enabled = ns->passthru_err_log_enabled;
 726                 req->timeout = NVME_IO_TIMEOUT;
 727         } else { /* no queuedata implies admin queue */
 728                 logging_enabled = nr->ctrl->passthru_err_log_enabled;
 729                 req->timeout = NVME_ADMIN_TIMEOUT;
 730         }
 731
 732         if (!logging_enabled)
 733                 req->rq_flags |= RQF_QUIET;
 734
 735         /* passthru commands should let the driver set the SGL flags */
 736         cmd->common.flags &= ~NVME_CMD_SGL_ALL;
 737
 738         req->cmd_flags |= REQ_FAILFAST_DRIVER;
 739         if (req->mq_hctx->type == HCTX_TYPE_POLL)
 740                 req->cmd_flags |= REQ_POLLED;
 741         nvme_clear_nvme_request(req);
 742         memcpy(nr->cmd, cmd, sizeof(*cmd));
 743 }
 744 EXPORT_SYMBOL_GPL(nvme_init_request);
 745
 746 /*
 747  * For something we're not in a state to send to the device the default action
 748  * is to busy it and retry it after the controller state is recovered.  However,
 749  * if the controller is deleting or if anything is marked for failfast or
 750  * nvme multipath it is immediately failed.
 751  *
 752  * Note: commands used to initialize the controller will be marked for failfast.
 753  * Note: nvme cli/ioctl commands are marked for failfast.
 754  */
 755 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
 756                 struct request *rq)
 757 {
 758         enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
 759
 760         if (state != NVME_CTRL_DELETING_NOIO &&
 761             state != NVME_CTRL_DELETING &&
 762             state != NVME_CTRL_DEAD &&
 763             !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
 764             !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
 765                 return BLK_STS_RESOURCE;
 766         return nvme_host_path_error(rq);
 767 }
 768 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
 769
 770 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 771                 bool queue_live, enum nvme_ctrl_state state)
 772 {
 773         struct nvme_request *req = nvme_req(rq);
 774
 775         /*
 776          * currently we have a problem sending passthru commands
 777          * on the admin_q if the controller is not LIVE because we can't
 778          * make sure that they are going out after the admin connect,
 779          * controller enable and/or other commands in the initialization
 780          * sequence. until the controller will be LIVE, fail with
 781          * BLK_STS_RESOURCE so that they will be rescheduled.
 782          */
 783         if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
 784                 return false;
 785
 786         if (ctrl->ops->flags & NVME_F_FABRICS) {
 787                 /*
 788                  * Only allow commands on a live queue, except for the connect
 789                  * command, which is require to set the queue live in the
 790                  * appropinquate states.
 791                  */
 792                 switch (state) {
 793                 case NVME_CTRL_CONNECTING:
 794                         if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
 795                             (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
 796                              req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
 797                              req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
 798                                 return true;
 799                         break;
 800                 default:
 801                         break;
 802                 case NVME_CTRL_DEAD:
 803                         return false;
 804                 }
 805         }
 806
 807         return queue_live;
 808 }
 809 EXPORT_SYMBOL_GPL(__nvme_check_ready);
 810
 811 static inline void nvme_setup_flush(struct nvme_ns *ns,
 812                 struct nvme_command *cmnd)
 813 {
 814         memset(cmnd, 0, sizeof(*cmnd));
 815         cmnd->common.opcode = nvme_cmd_flush;
 816         cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
 817 }
 818
 819 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
 820                 struct nvme_command *cmnd)
 821 {
 822         unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
 823         struct nvme_dsm_range *range;
 824         struct bio *bio;
 825
 826         /*
 827          * Some devices do not consider the DSM 'Number of Ranges' field when
 828          * determining how much data to DMA. Always allocate memory for maximum
 829          * number of segments to prevent device reading beyond end of buffer.
 830          */
 831         static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
 832
 833         range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
 834         if (!range) {
 835                 /*
 836                  * If we fail allocation our range, fallback to the controller
 837                  * discard page. If that's also busy, it's safe to return
 838                  * busy, as we know we can make progress once that's freed.
 839                  */
 840                 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
 841                         return BLK_STS_RESOURCE;
 842
 843                 range = page_address(ns->ctrl->discard_page);
 844         }
 845
 846         if (queue_max_discard_segments(req->q) == 1) {
 847                 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
 848                 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
 849
 850                 range[0].cattr = cpu_to_le32(0);
 851                 range[0].nlb = cpu_to_le32(nlb);
 852                 range[0].slba = cpu_to_le64(slba);
 853                 n = 1;
 854         } else {
 855                 __rq_for_each_bio(bio, req) {
 856                         u64 slba = nvme_sect_to_lba(ns->head,
 857                                                     bio->bi_iter.bi_sector);
 858                         u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
 859
 860                         if (n < segments) {
 861                                 range[n].cattr = cpu_to_le32(0);
 862                                 range[n].nlb = cpu_to_le32(nlb);
 863                                 range[n].slba = cpu_to_le64(slba);
 864                         }
 865                         n++;
 866                 }
 867         }
 868
 869         if (WARN_ON_ONCE(n != segments)) {
 870                 if (virt_to_page(range) == ns->ctrl->discard_page)
 871                         clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
 872                 else
 873                         kfree(range);
 874                 return BLK_STS_IOERR;
 875         }
 876
 877         memset(cmnd, 0, sizeof(*cmnd));
 878         cmnd->dsm.opcode = nvme_cmd_dsm;
 879         cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
 880         cmnd->dsm.nr = cpu_to_le32(segments - 1);
 881         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 882
 883         bvec_set_virt(&req->special_vec, range, alloc_size);
 884         req->rq_flags |= RQF_SPECIAL_PAYLOAD;
 885
 886         return BLK_STS_OK;
 887 }
 888
 889 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
 890                               struct request *req)
 891 {
 892         u32 upper, lower;
 893         u64 ref48;
 894
 895         /* both rw and write zeroes share the same reftag format */
 896         switch (ns->head->guard_type) {
 897         case NVME_NVM_NS_16B_GUARD:
 898                 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
 899                 break;
 900         case NVME_NVM_NS_64B_GUARD:
 901                 ref48 = ext_pi_ref_tag(req);
 902                 lower = lower_32_bits(ref48);
 903                 upper = upper_32_bits(ref48);
 904
 905                 cmnd->rw.reftag = cpu_to_le32(lower);
 906                 cmnd->rw.cdw3 = cpu_to_le32(upper);
 907                 break;
 908         default:
 909                 break;
 910         }
 911 }
 912
 913 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
 914                 struct request *req, struct nvme_command *cmnd)
 915 {
 916         memset(cmnd, 0, sizeof(*cmnd));
 917
 918         if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
 919                 return nvme_setup_discard(ns, req, cmnd);
 920
 921         cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
 922         cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
 923         cmnd->write_zeroes.slba =
 924                 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
 925         cmnd->write_zeroes.length =
 926                 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
 927
 928         if (!(req->cmd_flags & REQ_NOUNMAP) &&
 929             (ns->head->features & NVME_NS_DEAC))
 930                 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
 931
 932         if (nvme_ns_has_pi(ns->head)) {
 933                 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
 934
 935                 switch (ns->head->pi_type) {
 936                 case NVME_NS_DPS_PI_TYPE1:
 937                 case NVME_NS_DPS_PI_TYPE2:
 938                         nvme_set_ref_tag(ns, cmnd, req);
 939                         break;
 940                 }
 941         }
 942
 943         return BLK_STS_OK;
 944 }
 945
 946 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
 947                 struct request *req, struct nvme_command *cmnd,
 948                 enum nvme_opcode op)
 949 {
 950         u16 control = 0;
 951         u32 dsmgmt = 0;
 952
 953         if (req->cmd_flags & REQ_FUA)
 954                 control |= NVME_RW_FUA;
 955         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 956                 control |= NVME_RW_LR;
 957
 958         if (req->cmd_flags & REQ_RAHEAD)
 959                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 960
 961         cmnd->rw.opcode = op;
 962         cmnd->rw.flags = 0;
 963         cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
 964         cmnd->rw.cdw2 = 0;
 965         cmnd->rw.cdw3 = 0;
 966         cmnd->rw.metadata = 0;
 967         cmnd->rw.slba =
 968                 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
 969         cmnd->rw.length =
 970                 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
 971         cmnd->rw.reftag = 0;
 972         cmnd->rw.apptag = 0;
 973         cmnd->rw.appmask = 0;
 974
 975         if (ns->head->ms) {
 976                 /*
 977                  * If formated with metadata, the block layer always provides a
 978                  * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
 979                  * we enable the PRACT bit for protection information or set the
 980                  * namespace capacity to zero to prevent any I/O.
 981                  */
 982                 if (!blk_integrity_rq(req)) {
 983                         if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
 984                                 return BLK_STS_NOTSUPP;
 985                         control |= NVME_RW_PRINFO_PRACT;
 986                 }
 987
 988                 switch (ns->head->pi_type) {
 989                 case NVME_NS_DPS_PI_TYPE3:
 990                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 991                         break;
 992                 case NVME_NS_DPS_PI_TYPE1:
 993                 case NVME_NS_DPS_PI_TYPE2:
 994                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 995                                         NVME_RW_PRINFO_PRCHK_REF;
 996                         if (op == nvme_cmd_zone_append)
 997                                 control |= NVME_RW_APPEND_PIREMAP;
 998                         nvme_set_ref_tag(ns, cmnd, req);
 999                         break;
1000                 }
1001         }
1002
1003         cmnd->rw.control = cpu_to_le16(control);
1004         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1005         return 0;
1006 }
1007
1008 void nvme_cleanup_cmd(struct request *req)
1009 {
1010         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1011                 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1012
1013                 if (req->special_vec.bv_page == ctrl->discard_page)
1014                         clear_bit_unlock(0, &ctrl->discard_page_busy);
1015                 else
1016                         kfree(bvec_virt(&req->special_vec));
1017         }
1018 }
1019 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1020
1021 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1022 {
1023         struct nvme_command *cmd = nvme_req(req)->cmd;
1024         blk_status_t ret = BLK_STS_OK;
1025
1026         if (!(req->rq_flags & RQF_DONTPREP))
1027                 nvme_clear_nvme_request(req);
1028
1029         switch (req_op(req)) {
1030         case REQ_OP_DRV_IN:
1031         case REQ_OP_DRV_OUT:
1032                 /* these are setup prior to execution in nvme_init_request() */
1033                 break;
1034         case REQ_OP_FLUSH:
1035                 nvme_setup_flush(ns, cmd);
1036                 break;
1037         case REQ_OP_ZONE_RESET_ALL:
1038         case REQ_OP_ZONE_RESET:
1039                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1040                 break;
1041         case REQ_OP_ZONE_OPEN:
1042                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1043                 break;
1044         case REQ_OP_ZONE_CLOSE:
1045                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1046                 break;
1047         case REQ_OP_ZONE_FINISH:
1048                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1049                 break;
1050         case REQ_OP_WRITE_ZEROES:
1051                 ret = nvme_setup_write_zeroes(ns, req, cmd);
1052                 break;
1053         case REQ_OP_DISCARD:
1054                 ret = nvme_setup_discard(ns, req, cmd);
1055                 break;
1056         case REQ_OP_READ:
1057                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1058                 break;
1059         case REQ_OP_WRITE:
1060                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1061                 break;
1062         case REQ_OP_ZONE_APPEND:
1063                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1064                 break;
1065         default:
1066                 WARN_ON_ONCE(1);
1067                 return BLK_STS_IOERR;
1068         }
1069
1070         cmd->common.command_id = nvme_cid(req);
1071         trace_nvme_setup_cmd(req, cmd);
1072         return ret;
1073 }
1074 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1075
1076 /*
1077  * Return values:
1078  * 0:  success
1079  * >0: nvme controller's cqe status response
1080  * <0: kernel error in lieu of controller response
1081  */
1082 int nvme_execute_rq(struct request *rq, bool at_head)
1083 {
1084         blk_status_t status;
1085
1086         status = blk_execute_rq(rq, at_head);
1087         if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1088                 return -EINTR;
1089         if (nvme_req(rq)->status)
1090                 return nvme_req(rq)->status;
1091         return blk_status_to_errno(status);
1092 }
1093 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1094
1095 /*
1096  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1097  * if the result is positive, it's an NVM Express status code
1098  */
1099 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1100                 union nvme_result *result, void *buffer, unsigned bufflen,
1101                 int qid, nvme_submit_flags_t flags)
1102 {
1103         struct request *req;
1104         int ret;
1105         blk_mq_req_flags_t blk_flags = 0;
1106
1107         if (flags & NVME_SUBMIT_NOWAIT)
1108                 blk_flags |= BLK_MQ_REQ_NOWAIT;
1109         if (flags & NVME_SUBMIT_RESERVED)
1110                 blk_flags |= BLK_MQ_REQ_RESERVED;
1111         if (qid == NVME_QID_ANY)
1112                 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1113         else
1114                 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1115                                                 qid - 1);
1116
1117         if (IS_ERR(req))
1118                 return PTR_ERR(req);
1119         nvme_init_request(req, cmd);
1120         if (flags & NVME_SUBMIT_RETRY)
1121                 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1122
1123         if (buffer && bufflen) {
1124                 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1125                 if (ret)
1126                         goto out;
1127         }
1128
1129         ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1130         if (result && ret >= 0)
1131                 *result = nvme_req(req)->result;
1132  out:
1133         blk_mq_free_request(req);
1134         return ret;
1135 }
1136 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1137
1138 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1139                 void *buffer, unsigned bufflen)
1140 {
1141         return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1142                         NVME_QID_ANY, 0);
1143 }
1144 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1145
1146 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1147 {
1148         u32 effects = 0;
1149
1150         if (ns) {
1151                 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1152                 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1153                         dev_warn_once(ctrl->device,
1154                                 "IO command:%02x has unusual effects:%08x\n",
1155                                 opcode, effects);
1156
1157                 /*
1158                  * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1159                  * which would deadlock when done on an I/O command.  Note that
1160                  * We already warn about an unusual effect above.
1161                  */
1162                 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1163         } else {
1164                 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1165         }
1166
1167         return effects;
1168 }
1169 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1170
1171 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1172 {
1173         u32 effects = nvme_command_effects(ctrl, ns, opcode);
1174
1175         /*
1176          * For simplicity, IO to all namespaces is quiesced even if the command
1177          * effects say only one namespace is affected.
1178          */
1179         if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1180                 mutex_lock(&ctrl->scan_lock);
1181                 mutex_lock(&ctrl->subsys->lock);
1182                 nvme_mpath_start_freeze(ctrl->subsys);
1183                 nvme_mpath_wait_freeze(ctrl->subsys);
1184                 nvme_start_freeze(ctrl);
1185                 nvme_wait_freeze(ctrl);
1186         }
1187         return effects;
1188 }
1189 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1190
1191 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1192                        struct nvme_command *cmd, int status)
1193 {
1194         if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1195                 nvme_unfreeze(ctrl);
1196                 nvme_mpath_unfreeze(ctrl->subsys);
1197                 mutex_unlock(&ctrl->subsys->lock);
1198                 mutex_unlock(&ctrl->scan_lock);
1199         }
1200         if (effects & NVME_CMD_EFFECTS_CCC) {
1201                 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1202                                       &ctrl->flags)) {
1203                         dev_info(ctrl->device,
1204 "controller capabilities changed, reset may be required to take effect.\n");
1205                 }
1206         }
1207         if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1208                 nvme_queue_scan(ctrl);
1209                 flush_work(&ctrl->scan_work);
1210         }
1211         if (ns)
1212                 return;
1213
1214         switch (cmd->common.opcode) {
1215         case nvme_admin_set_features:
1216                 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1217                 case NVME_FEAT_KATO:
1218                         /*
1219                          * Keep alive commands interval on the host should be
1220                          * updated when KATO is modified by Set Features
1221                          * commands.
1222                          */
1223                         if (!status)
1224                                 nvme_update_keep_alive(ctrl, cmd);
1225                         break;
1226                 default:
1227                         break;
1228                 }
1229                 break;
1230         default:
1231                 break;
1232         }
1233 }
1234 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1235
1236 /*
1237  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1238  *
1239  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1240  *   accounting for transport roundtrip times [..].
1241  */
1242 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1243 {
1244         unsigned long delay = ctrl->kato * HZ / 2;
1245
1246         /*
1247          * When using Traffic Based Keep Alive, we need to run
1248          * nvme_keep_alive_work at twice the normal frequency, as one
1249          * command completion can postpone sending a keep alive command
1250          * by up to twice the delay between runs.
1251          */
1252         if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1253                 delay /= 2;
1254         return delay;
1255 }
1256
1257 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1258 {
1259         unsigned long now = jiffies;
1260         unsigned long delay = nvme_keep_alive_work_period(ctrl);
1261         unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1262
1263         if (time_after(now, ka_next_check_tm))
1264                 delay = 0;
1265         else
1266                 delay = ka_next_check_tm - now;
1267
1268         queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1269 }
1270
1271 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1272                                                  blk_status_t status)
1273 {
1274         struct nvme_ctrl *ctrl = rq->end_io_data;
1275         unsigned long flags;
1276         bool startka = false;
1277         unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1278         unsigned long delay = nvme_keep_alive_work_period(ctrl);
1279
1280         /*
1281          * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1282          * at the desired frequency.
1283          */
1284         if (rtt <= delay) {
1285                 delay -= rtt;
1286         } else {
1287                 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1288                          jiffies_to_msecs(rtt));
1289                 delay = 0;
1290         }
1291
1292         blk_mq_free_request(rq);
1293
1294         if (status) {
1295                 dev_err(ctrl->device,
1296                         "failed nvme_keep_alive_end_io error=%d\n",
1297                                 status);
1298                 return RQ_END_IO_NONE;
1299         }
1300
1301         ctrl->ka_last_check_time = jiffies;
1302         ctrl->comp_seen = false;
1303         spin_lock_irqsave(&ctrl->lock, flags);
1304         if (ctrl->state == NVME_CTRL_LIVE ||
1305             ctrl->state == NVME_CTRL_CONNECTING)
1306                 startka = true;
1307         spin_unlock_irqrestore(&ctrl->lock, flags);
1308         if (startka)
1309                 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1310         return RQ_END_IO_NONE;
1311 }
1312
1313 static void nvme_keep_alive_work(struct work_struct *work)
1314 {
1315         struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1316                         struct nvme_ctrl, ka_work);
1317         bool comp_seen = ctrl->comp_seen;
1318         struct request *rq;
1319
1320         ctrl->ka_last_check_time = jiffies;
1321
1322         if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1323                 dev_dbg(ctrl->device,
1324                         "reschedule traffic based keep-alive timer\n");
1325                 ctrl->comp_seen = false;
1326                 nvme_queue_keep_alive_work(ctrl);
1327                 return;
1328         }
1329
1330         rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1331                                   BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1332         if (IS_ERR(rq)) {
1333                 /* allocation failure, reset the controller */
1334                 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1335                 nvme_reset_ctrl(ctrl);
1336                 return;
1337         }
1338         nvme_init_request(rq, &ctrl->ka_cmd);
1339
1340         rq->timeout = ctrl->kato * HZ;
1341         rq->end_io = nvme_keep_alive_end_io;
1342         rq->end_io_data = ctrl;
1343         blk_execute_rq_nowait(rq, false);
1344 }
1345
1346 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1347 {
1348         if (unlikely(ctrl->kato == 0))
1349                 return;
1350
1351         nvme_queue_keep_alive_work(ctrl);
1352 }
1353
1354 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1355 {
1356         if (unlikely(ctrl->kato == 0))
1357                 return;
1358
1359         cancel_delayed_work_sync(&ctrl->ka_work);
1360 }
1361 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1362
1363 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1364                                    struct nvme_command *cmd)
1365 {
1366         unsigned int new_kato =
1367                 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1368
1369         dev_info(ctrl->device,
1370                  "keep alive interval updated from %u ms to %u ms\n",
1371                  ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1372
1373         nvme_stop_keep_alive(ctrl);
1374         ctrl->kato = new_kato;
1375         nvme_start_keep_alive(ctrl);
1376 }
1377
1378 /*
1379  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1380  * flag, thus sending any new CNS opcodes has a big chance of not working.
1381  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1382  * (but not for any later version).
1383  */
1384 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1385 {
1386         if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1387                 return ctrl->vs < NVME_VS(1, 2, 0);
1388         return ctrl->vs < NVME_VS(1, 1, 0);
1389 }
1390
1391 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1392 {
1393         struct nvme_command c = { };
1394         int error;
1395
1396         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1397         c.identify.opcode = nvme_admin_identify;
1398         c.identify.cns = NVME_ID_CNS_CTRL;
1399
1400         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1401         if (!*id)
1402                 return -ENOMEM;
1403
1404         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1405                         sizeof(struct nvme_id_ctrl));
1406         if (error) {
1407                 kfree(*id);
1408                 *id = NULL;
1409         }
1410         return error;
1411 }
1412
1413 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1414                 struct nvme_ns_id_desc *cur, bool *csi_seen)
1415 {
1416         const char *warn_str = "ctrl returned bogus length:";
1417         void *data = cur;
1418
1419         switch (cur->nidt) {
1420         case NVME_NIDT_EUI64:
1421                 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1422                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1423                                  warn_str, cur->nidl);
1424                         return -1;
1425                 }
1426                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1427                         return NVME_NIDT_EUI64_LEN;
1428                 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1429                 return NVME_NIDT_EUI64_LEN;
1430         case NVME_NIDT_NGUID:
1431                 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1432                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1433                                  warn_str, cur->nidl);
1434                         return -1;
1435                 }
1436                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1437                         return NVME_NIDT_NGUID_LEN;
1438                 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1439                 return NVME_NIDT_NGUID_LEN;
1440         case NVME_NIDT_UUID:
1441                 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1442                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1443                                  warn_str, cur->nidl);
1444                         return -1;
1445                 }
1446                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1447                         return NVME_NIDT_UUID_LEN;
1448                 uuid_copy(&ids->uuid, data + sizeof(*cur));
1449                 return NVME_NIDT_UUID_LEN;
1450         case NVME_NIDT_CSI:
1451                 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1452                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1453                                  warn_str, cur->nidl);
1454                         return -1;
1455                 }
1456                 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1457                 *csi_seen = true;
1458                 return NVME_NIDT_CSI_LEN;
1459         default:
1460                 /* Skip unknown types */
1461                 return cur->nidl;
1462         }
1463 }
1464
1465 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1466                 struct nvme_ns_info *info)
1467 {
1468         struct nvme_command c = { };
1469         bool csi_seen = false;
1470         int status, pos, len;
1471         void *data;
1472
1473         if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1474                 return 0;
1475         if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1476                 return 0;
1477
1478         c.identify.opcode = nvme_admin_identify;
1479         c.identify.nsid = cpu_to_le32(info->nsid);
1480         c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1481
1482         data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1483         if (!data)
1484                 return -ENOMEM;
1485
1486         status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1487                                       NVME_IDENTIFY_DATA_SIZE);
1488         if (status) {
1489                 dev_warn(ctrl->device,
1490                         "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1491                         info->nsid, status);
1492                 goto free_data;
1493         }
1494
1495         for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1496                 struct nvme_ns_id_desc *cur = data + pos;
1497
1498                 if (cur->nidl == 0)
1499                         break;
1500
1501                 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1502                 if (len < 0)
1503                         break;
1504
1505                 len += sizeof(*cur);
1506         }
1507
1508         if (nvme_multi_css(ctrl) && !csi_seen) {
1509                 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1510                          info->nsid);
1511                 status = -EINVAL;
1512         }
1513
1514 free_data:
1515         kfree(data);
1516         return status;
1517 }
1518
1519 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1520                         struct nvme_id_ns **id)
1521 {
1522         struct nvme_command c = { };
1523         int error;
1524
1525         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1526         c.identify.opcode = nvme_admin_identify;
1527         c.identify.nsid = cpu_to_le32(nsid);
1528         c.identify.cns = NVME_ID_CNS_NS;
1529
1530         *id = kmalloc(sizeof(**id), GFP_KERNEL);
1531         if (!*id)
1532                 return -ENOMEM;
1533
1534         error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1535         if (error) {
1536                 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1537                 kfree(*id);
1538                 *id = NULL;
1539         }
1540         return error;
1541 }
1542
1543 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1544                 struct nvme_ns_info *info)
1545 {
1546         struct nvme_ns_ids *ids = &info->ids;
1547         struct nvme_id_ns *id;
1548         int ret;
1549
1550         ret = nvme_identify_ns(ctrl, info->nsid, &id);
1551         if (ret)
1552                 return ret;
1553
1554         if (id->ncap == 0) {
1555                 /* namespace not allocated or attached */
1556                 info->is_removed = true;
1557                 ret = -ENODEV;
1558                 goto error;
1559         }
1560
1561         info->anagrpid = id->anagrpid;
1562         info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1563         info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1564         info->is_ready = true;
1565         if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1566                 dev_info(ctrl->device,
1567                          "Ignoring bogus Namespace Identifiers\n");
1568         } else {
1569                 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1570                     !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1571                         memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1572                 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1573                     !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1574                         memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1575         }
1576
1577 error:
1578         kfree(id);
1579         return ret;
1580 }
1581
1582 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1583                 struct nvme_ns_info *info)
1584 {
1585         struct nvme_id_ns_cs_indep *id;
1586         struct nvme_command c = {
1587                 .identify.opcode        = nvme_admin_identify,
1588                 .identify.nsid          = cpu_to_le32(info->nsid),
1589                 .identify.cns           = NVME_ID_CNS_NS_CS_INDEP,
1590         };
1591         int ret;
1592
1593         id = kmalloc(sizeof(*id), GFP_KERNEL);
1594         if (!id)
1595                 return -ENOMEM;
1596
1597         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1598         if (!ret) {
1599                 info->anagrpid = id->anagrpid;
1600                 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1601                 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1602                 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1603         }
1604         kfree(id);
1605         return ret;
1606 }
1607
1608 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1609                 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1610 {
1611         union nvme_result res = { 0 };
1612         struct nvme_command c = { };
1613         int ret;
1614
1615         c.features.opcode = op;
1616         c.features.fid = cpu_to_le32(fid);
1617         c.features.dword11 = cpu_to_le32(dword11);
1618
1619         ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1620                         buffer, buflen, NVME_QID_ANY, 0);
1621         if (ret >= 0 && result)
1622                 *result = le32_to_cpu(res.u32);
1623         return ret;
1624 }
1625
1626 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1627                       unsigned int dword11, void *buffer, size_t buflen,
1628                       u32 *result)
1629 {
1630         return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1631                              buflen, result);
1632 }
1633 EXPORT_SYMBOL_GPL(nvme_set_features);
1634
1635 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1636                       unsigned int dword11, void *buffer, size_t buflen,
1637                       u32 *result)
1638 {
1639         return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1640                              buflen, result);
1641 }
1642 EXPORT_SYMBOL_GPL(nvme_get_features);
1643
1644 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1645 {
1646         u32 q_count = (*count - 1) | ((*count - 1) << 16);
1647         u32 result;
1648         int status, nr_io_queues;
1649
1650         status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1651                         &result);
1652         if (status < 0)
1653                 return status;
1654
1655         /*
1656          * Degraded controllers might return an error when setting the queue
1657          * count.  We still want to be able to bring them online and offer
1658          * access to the admin queue, as that might be only way to fix them up.
1659          */
1660         if (status > 0) {
1661                 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1662                 *count = 0;
1663         } else {
1664                 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1665                 *count = min(*count, nr_io_queues);
1666         }
1667
1668         return 0;
1669 }
1670 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1671
1672 #define NVME_AEN_SUPPORTED \
1673         (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1674          NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1675
1676 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1677 {
1678         u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1679         int status;
1680
1681         if (!supported_aens)
1682                 return;
1683
1684         status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1685                         NULL, 0, &result);
1686         if (status)
1687                 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1688                          supported_aens);
1689
1690         queue_work(nvme_wq, &ctrl->async_event_work);
1691 }
1692
1693 static int nvme_ns_open(struct nvme_ns *ns)
1694 {
1695
1696         /* should never be called due to GENHD_FL_HIDDEN */
1697         if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1698                 goto fail;
1699         if (!nvme_get_ns(ns))
1700                 goto fail;
1701         if (!try_module_get(ns->ctrl->ops->module))
1702                 goto fail_put_ns;
1703
1704         return 0;
1705
1706 fail_put_ns:
1707         nvme_put_ns(ns);
1708 fail:
1709         return -ENXIO;
1710 }
1711
1712 static void nvme_ns_release(struct nvme_ns *ns)
1713 {
1714
1715         module_put(ns->ctrl->ops->module);
1716         nvme_put_ns(ns);
1717 }
1718
1719 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1720 {
1721         return nvme_ns_open(disk->private_data);
1722 }
1723
1724 static void nvme_release(struct gendisk *disk)
1725 {
1726         nvme_ns_release(disk->private_data);
1727 }
1728
1729 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1730 {
1731         /* some standard values */
1732         geo->heads = 1 << 6;
1733         geo->sectors = 1 << 5;
1734         geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1735         return 0;
1736 }
1737
1738 static bool nvme_init_integrity(struct gendisk *disk, struct nvme_ns_head *head)
1739 {
1740         struct blk_integrity integrity = { };
1741
1742         blk_integrity_unregister(disk);
1743
1744         if (!head->ms)
1745                 return true;
1746
1747         /*
1748          * PI can always be supported as we can ask the controller to simply
1749          * insert/strip it, which is not possible for other kinds of metadata.
1750          */
1751         if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1752             !(head->features & NVME_NS_METADATA_SUPPORTED))
1753                 return nvme_ns_has_pi(head);
1754
1755         switch (head->pi_type) {
1756         case NVME_NS_DPS_PI_TYPE3:
1757                 switch (head->guard_type) {
1758                 case NVME_NVM_NS_16B_GUARD:
1759                         integrity.profile = &t10_pi_type3_crc;
1760                         integrity.tag_size = sizeof(u16) + sizeof(u32);
1761                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1762                         break;
1763                 case NVME_NVM_NS_64B_GUARD:
1764                         integrity.profile = &ext_pi_type3_crc64;
1765                         integrity.tag_size = sizeof(u16) + 6;
1766                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1767                         break;
1768                 default:
1769                         integrity.profile = NULL;
1770                         break;
1771                 }
1772                 break;
1773         case NVME_NS_DPS_PI_TYPE1:
1774         case NVME_NS_DPS_PI_TYPE2:
1775                 switch (head->guard_type) {
1776                 case NVME_NVM_NS_16B_GUARD:
1777                         integrity.profile = &t10_pi_type1_crc;
1778                         integrity.tag_size = sizeof(u16);
1779                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1780                         break;
1781                 case NVME_NVM_NS_64B_GUARD:
1782                         integrity.profile = &ext_pi_type1_crc64;
1783                         integrity.tag_size = sizeof(u16);
1784                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1785                         break;
1786                 default:
1787                         integrity.profile = NULL;
1788                         break;
1789                 }
1790                 break;
1791         default:
1792                 integrity.profile = NULL;
1793                 break;
1794         }
1795
1796         integrity.tuple_size = head->ms;
1797         integrity.pi_offset = head->pi_offset;
1798         blk_integrity_register(disk, &integrity);
1799         return true;
1800 }
1801
1802 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1803 {
1804         struct nvme_ctrl *ctrl = ns->ctrl;
1805
1806         if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1807                 lim->max_hw_discard_sectors =
1808                         nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1809         else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1810                 lim->max_hw_discard_sectors = UINT_MAX;
1811         else
1812                 lim->max_hw_discard_sectors = 0;
1813
1814         lim->discard_granularity = lim->logical_block_size;
1815
1816         if (ctrl->dmrl)
1817                 lim->max_discard_segments = ctrl->dmrl;
1818         else
1819                 lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1820 }
1821
1822 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1823 {
1824         return uuid_equal(&a->uuid, &b->uuid) &&
1825                 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1826                 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1827                 a->csi == b->csi;
1828 }
1829
1830 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1831                 struct nvme_id_ns_nvm **nvmp)
1832 {
1833         struct nvme_command c = {
1834                 .identify.opcode        = nvme_admin_identify,
1835                 .identify.nsid          = cpu_to_le32(nsid),
1836                 .identify.cns           = NVME_ID_CNS_CS_NS,
1837                 .identify.csi           = NVME_CSI_NVM,
1838         };
1839         struct nvme_id_ns_nvm *nvm;
1840         int ret;
1841
1842         nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1843         if (!nvm)
1844                 return -ENOMEM;
1845
1846         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1847         if (ret)
1848                 kfree(nvm);
1849         else
1850                 *nvmp = nvm;
1851         return ret;
1852 }
1853
1854 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1855                 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1856 {
1857         u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1858
1859         /* no support for storage tag formats right now */
1860         if (nvme_elbaf_sts(elbaf))
1861                 return;
1862
1863         head->guard_type = nvme_elbaf_guard_type(elbaf);
1864         switch (head->guard_type) {
1865         case NVME_NVM_NS_64B_GUARD:
1866                 head->pi_size = sizeof(struct crc64_pi_tuple);
1867                 break;
1868         case NVME_NVM_NS_16B_GUARD:
1869                 head->pi_size = sizeof(struct t10_pi_tuple);
1870                 break;
1871         default:
1872                 break;
1873         }
1874 }
1875
1876 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1877                 struct nvme_ns_head *head, struct nvme_id_ns *id,
1878                 struct nvme_id_ns_nvm *nvm)
1879 {
1880         head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1881         head->pi_type = 0;
1882         head->pi_size = 0;
1883         head->pi_offset = 0;
1884         head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1885         if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1886                 return;
1887
1888         if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1889                 nvme_configure_pi_elbas(head, id, nvm);
1890         } else {
1891                 head->pi_size = sizeof(struct t10_pi_tuple);
1892                 head->guard_type = NVME_NVM_NS_16B_GUARD;
1893         }
1894
1895         if (head->pi_size && head->ms >= head->pi_size)
1896                 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1897         if (!(id->dps & NVME_NS_DPS_PI_FIRST))
1898                 head->pi_offset = head->ms - head->pi_size;
1899
1900         if (ctrl->ops->flags & NVME_F_FABRICS) {
1901                 /*
1902                  * The NVMe over Fabrics specification only supports metadata as
1903                  * part of the extended data LBA.  We rely on HCA/HBA support to
1904                  * remap the separate metadata buffer from the block layer.
1905                  */
1906                 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1907                         return;
1908
1909                 head->features |= NVME_NS_EXT_LBAS;
1910
1911                 /*
1912                  * The current fabrics transport drivers support namespace
1913                  * metadata formats only if nvme_ns_has_pi() returns true.
1914                  * Suppress support for all other formats so the namespace will
1915                  * have a 0 capacity and not be usable through the block stack.
1916                  *
1917                  * Note, this check will need to be modified if any drivers
1918                  * gain the ability to use other metadata formats.
1919                  */
1920                 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1921                         head->features |= NVME_NS_METADATA_SUPPORTED;
1922         } else {
1923                 /*
1924                  * For PCIe controllers, we can't easily remap the separate
1925                  * metadata buffer from the block layer and thus require a
1926                  * separate metadata buffer for block layer metadata/PI support.
1927                  * We allow extended LBAs for the passthrough interface, though.
1928                  */
1929                 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1930                         head->features |= NVME_NS_EXT_LBAS;
1931                 else
1932                         head->features |= NVME_NS_METADATA_SUPPORTED;
1933         }
1934 }
1935
1936 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
1937 {
1938         return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
1939 }
1940
1941 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
1942                 struct queue_limits *lim)
1943 {
1944         lim->max_hw_sectors = ctrl->max_hw_sectors;
1945         lim->max_segments = min_t(u32, USHRT_MAX,
1946                 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
1947         lim->max_integrity_segments = ctrl->max_integrity_segments;
1948         lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
1949         lim->max_segment_size = UINT_MAX;
1950         lim->dma_alignment = 3;
1951 }
1952
1953 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
1954                 struct queue_limits *lim)
1955 {
1956         struct nvme_ns_head *head = ns->head;
1957         u32 bs = 1U << head->lba_shift;
1958         u32 atomic_bs, phys_bs, io_opt = 0;
1959         bool valid = true;
1960
1961         /*
1962          * The block layer can't support LBA sizes larger than the page size
1963          * or smaller than a sector size yet, so catch this early and don't
1964          * allow block I/O.
1965          */
1966         if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
1967                 bs = (1 << 9);
1968                 valid = false;
1969         }
1970
1971         atomic_bs = phys_bs = bs;
1972         if (id->nabo == 0) {
1973                 /*
1974                  * Bit 1 indicates whether NAWUPF is defined for this namespace
1975                  * and whether it should be used instead of AWUPF. If NAWUPF ==
1976                  * 0 then AWUPF must be used instead.
1977                  */
1978                 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1979                         atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1980                 else
1981                         atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1982         }
1983
1984         if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1985                 /* NPWG = Namespace Preferred Write Granularity */
1986                 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1987                 /* NOWS = Namespace Optimal Write Size */
1988                 io_opt = bs * (1 + le16_to_cpu(id->nows));
1989         }
1990
1991         /*
1992          * Linux filesystems assume writing a single physical block is
1993          * an atomic operation. Hence limit the physical block size to the
1994          * value of the Atomic Write Unit Power Fail parameter.
1995          */
1996         lim->logical_block_size = bs;
1997         lim->physical_block_size = min(phys_bs, atomic_bs);
1998         lim->io_min = phys_bs;
1999         lim->io_opt = io_opt;
2000         if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
2001                 lim->max_write_zeroes_sectors = UINT_MAX;
2002         else
2003                 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2004         return valid;
2005 }
2006
2007 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2008 {
2009         return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2010 }
2011
2012 static inline bool nvme_first_scan(struct gendisk *disk)
2013 {
2014         /* nvme_alloc_ns() scans the disk prior to adding it */
2015         return !disk_live(disk);
2016 }
2017
2018 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2019                 struct queue_limits *lim)
2020 {
2021         struct nvme_ctrl *ctrl = ns->ctrl;
2022         u32 iob;
2023
2024         if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2025             is_power_of_2(ctrl->max_hw_sectors))
2026                 iob = ctrl->max_hw_sectors;
2027         else
2028                 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2029
2030         if (!iob)
2031                 return;
2032
2033         if (!is_power_of_2(iob)) {
2034                 if (nvme_first_scan(ns->disk))
2035                         pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2036                                 ns->disk->disk_name, iob);
2037                 return;
2038         }
2039
2040         if (blk_queue_is_zoned(ns->disk->queue)) {
2041                 if (nvme_first_scan(ns->disk))
2042                         pr_warn("%s: ignoring zoned namespace IO boundary\n",
2043                                 ns->disk->disk_name);
2044                 return;
2045         }
2046
2047         lim->chunk_sectors = iob;
2048 }
2049
2050 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2051                 struct nvme_ns_info *info)
2052 {
2053         struct queue_limits lim;
2054         int ret;
2055
2056         blk_mq_freeze_queue(ns->disk->queue);
2057         lim = queue_limits_start_update(ns->disk->queue);
2058         nvme_set_ctrl_limits(ns->ctrl, &lim);
2059         ret = queue_limits_commit_update(ns->disk->queue, &lim);
2060         set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2061         blk_mq_unfreeze_queue(ns->disk->queue);
2062
2063         /* Hide the block-interface for these devices */
2064         if (!ret)
2065                 ret = -ENODEV;
2066         return ret;
2067 }
2068
2069 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2070                 struct nvme_ns_info *info)
2071 {
2072         bool vwc = ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT;
2073         struct queue_limits lim;
2074         struct nvme_id_ns_nvm *nvm = NULL;
2075         struct nvme_id_ns *id;
2076         sector_t capacity;
2077         unsigned lbaf;
2078         int ret;
2079
2080         ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2081         if (ret)
2082                 return ret;
2083
2084         if (id->ncap == 0) {
2085                 /* namespace not allocated or attached */
2086                 info->is_removed = true;
2087                 ret = -ENODEV;
2088                 goto out;
2089         }
2090
2091         if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2092                 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2093                 if (ret < 0)
2094                         goto out;
2095         }
2096
2097         blk_mq_freeze_queue(ns->disk->queue);
2098         lbaf = nvme_lbaf_index(id->flbas);
2099         ns->head->lba_shift = id->lbaf[lbaf].ds;
2100         ns->head->nuse = le64_to_cpu(id->nuse);
2101         capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2102
2103         lim = queue_limits_start_update(ns->disk->queue);
2104         nvme_set_ctrl_limits(ns->ctrl, &lim);
2105         nvme_configure_metadata(ns->ctrl, ns->head, id, nvm);
2106         nvme_set_chunk_sectors(ns, id, &lim);
2107         if (!nvme_update_disk_info(ns, id, &lim))
2108                 capacity = 0;
2109         nvme_config_discard(ns, &lim);
2110         if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2111             ns->head->ids.csi == NVME_CSI_ZNS) {
2112                 ret = nvme_update_zone_info(ns, lbaf, &lim);
2113                 if (ret) {
2114                         blk_mq_unfreeze_queue(ns->disk->queue);
2115                         goto out;
2116                 }
2117         }
2118         ret = queue_limits_commit_update(ns->disk->queue, &lim);
2119         if (ret) {
2120                 blk_mq_unfreeze_queue(ns->disk->queue);
2121                 goto out;
2122         }
2123
2124         /*
2125          * Register a metadata profile for PI, or the plain non-integrity NVMe
2126          * metadata masquerading as Type 0 if supported, otherwise reject block
2127          * I/O to namespaces with metadata except when the namespace supports
2128          * PI, as it can strip/insert in that case.
2129          */
2130         if (!nvme_init_integrity(ns->disk, ns->head))
2131                 capacity = 0;
2132
2133         set_capacity_and_notify(ns->disk, capacity);
2134
2135         /*
2136          * Only set the DEAC bit if the device guarantees that reads from
2137          * deallocated data return zeroes.  While the DEAC bit does not
2138          * require that, it must be a no-op if reads from deallocated data
2139          * do not return zeroes.
2140          */
2141         if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2142                 ns->head->features |= NVME_NS_DEAC;
2143         set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2144         blk_queue_write_cache(ns->disk->queue, vwc, vwc);
2145         set_bit(NVME_NS_READY, &ns->flags);
2146         blk_mq_unfreeze_queue(ns->disk->queue);
2147
2148         if (blk_queue_is_zoned(ns->queue)) {
2149                 ret = blk_revalidate_disk_zones(ns->disk, NULL);
2150                 if (ret && !nvme_first_scan(ns->disk))
2151                         goto out;
2152         }
2153
2154         ret = 0;
2155 out:
2156         kfree(nvm);
2157         kfree(id);
2158         return ret;
2159 }
2160
2161 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2162 {
2163         bool unsupported = false;
2164         int ret;
2165
2166         switch (info->ids.csi) {
2167         case NVME_CSI_ZNS:
2168                 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2169                         dev_info(ns->ctrl->device,
2170         "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2171                                 info->nsid);
2172                         ret = nvme_update_ns_info_generic(ns, info);
2173                         break;
2174                 }
2175                 ret = nvme_update_ns_info_block(ns, info);
2176                 break;
2177         case NVME_CSI_NVM:
2178                 ret = nvme_update_ns_info_block(ns, info);
2179                 break;
2180         default:
2181                 dev_info(ns->ctrl->device,
2182                         "block device for nsid %u not supported (csi %u)\n",
2183                         info->nsid, info->ids.csi);
2184                 ret = nvme_update_ns_info_generic(ns, info);
2185                 break;
2186         }
2187
2188         /*
2189          * If probing fails due an unsupported feature, hide the block device,
2190          * but still allow other access.
2191          */
2192         if (ret == -ENODEV) {
2193                 ns->disk->flags |= GENHD_FL_HIDDEN;
2194                 set_bit(NVME_NS_READY, &ns->flags);
2195                 unsupported = true;
2196                 ret = 0;
2197         }
2198
2199         if (!ret && nvme_ns_head_multipath(ns->head)) {
2200                 struct queue_limits lim;
2201
2202                 blk_mq_freeze_queue(ns->head->disk->queue);
2203                 if (unsupported)
2204                         ns->head->disk->flags |= GENHD_FL_HIDDEN;
2205                 else
2206                         nvme_init_integrity(ns->head->disk, ns->head);
2207                 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2208                 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2209                 nvme_mpath_revalidate_paths(ns);
2210
2211                 lim = queue_limits_start_update(ns->head->disk->queue);
2212                 queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2213                                         ns->head->disk->disk_name);
2214                 ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2215                 blk_mq_unfreeze_queue(ns->head->disk->queue);
2216         }
2217
2218         return ret;
2219 }
2220
2221 #ifdef CONFIG_BLK_SED_OPAL
2222 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2223                 bool send)
2224 {
2225         struct nvme_ctrl *ctrl = data;
2226         struct nvme_command cmd = { };
2227
2228         if (send)
2229                 cmd.common.opcode = nvme_admin_security_send;
2230         else
2231                 cmd.common.opcode = nvme_admin_security_recv;
2232         cmd.common.nsid = 0;
2233         cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2234         cmd.common.cdw11 = cpu_to_le32(len);
2235
2236         return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2237                         NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2238 }
2239
2240 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2241 {
2242         if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2243                 if (!ctrl->opal_dev)
2244                         ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2245                 else if (was_suspended)
2246                         opal_unlock_from_suspend(ctrl->opal_dev);
2247         } else {
2248                 free_opal_dev(ctrl->opal_dev);
2249                 ctrl->opal_dev = NULL;
2250         }
2251 }
2252 #else
2253 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2254 {
2255 }
2256 #endif /* CONFIG_BLK_SED_OPAL */
2257
2258 #ifdef CONFIG_BLK_DEV_ZONED
2259 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2260                 unsigned int nr_zones, report_zones_cb cb, void *data)
2261 {
2262         return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2263                         data);
2264 }
2265 #else
2266 #define nvme_report_zones       NULL
2267 #endif /* CONFIG_BLK_DEV_ZONED */
2268
2269 const struct block_device_operations nvme_bdev_ops = {
2270         .owner          = THIS_MODULE,
2271         .ioctl          = nvme_ioctl,
2272         .compat_ioctl   = blkdev_compat_ptr_ioctl,
2273         .open           = nvme_open,
2274         .release        = nvme_release,
2275         .getgeo         = nvme_getgeo,
2276         .report_zones   = nvme_report_zones,
2277         .pr_ops         = &nvme_pr_ops,
2278 };
2279
2280 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2281                 u32 timeout, const char *op)
2282 {
2283         unsigned long timeout_jiffies = jiffies + timeout * HZ;
2284         u32 csts;
2285         int ret;
2286
2287         while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2288                 if (csts == ~0)
2289                         return -ENODEV;
2290                 if ((csts & mask) == val)
2291                         break;
2292
2293                 usleep_range(1000, 2000);
2294                 if (fatal_signal_pending(current))
2295                         return -EINTR;
2296                 if (time_after(jiffies, timeout_jiffies)) {
2297                         dev_err(ctrl->device,
2298                                 "Device not ready; aborting %s, CSTS=0x%x\n",
2299                                 op, csts);
2300                         return -ENODEV;
2301                 }
2302         }
2303
2304         return ret;
2305 }
2306
2307 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2308 {
2309         int ret;
2310
2311         ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2312         if (shutdown)
2313                 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2314         else
2315                 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2316
2317         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2318         if (ret)
2319                 return ret;
2320
2321         if (shutdown) {
2322                 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2323                                        NVME_CSTS_SHST_CMPLT,
2324                                        ctrl->shutdown_timeout, "shutdown");
2325         }
2326         if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2327                 msleep(NVME_QUIRK_DELAY_AMOUNT);
2328         return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2329                                (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2330 }
2331 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2332
2333 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2334 {
2335         unsigned dev_page_min;
2336         u32 timeout;
2337         int ret;
2338
2339         ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2340         if (ret) {
2341                 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2342                 return ret;
2343         }
2344         dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2345
2346         if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2347                 dev_err(ctrl->device,
2348                         "Minimum device page size %u too large for host (%u)\n",
2349                         1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2350                 return -ENODEV;
2351         }
2352
2353         if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2354                 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2355         else
2356                 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2357
2358         if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2359                 ctrl->ctrl_config |= NVME_CC_CRIME;
2360
2361         ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2362         ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2363         ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2364         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2365         if (ret)
2366                 return ret;
2367
2368         /* Flush write to device (required if transport is PCI) */
2369         ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2370         if (ret)
2371                 return ret;
2372
2373         /* CAP value may change after initial CC write */
2374         ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2375         if (ret)
2376                 return ret;
2377
2378         timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2379         if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2380                 u32 crto, ready_timeout;
2381
2382                 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2383                 if (ret) {
2384                         dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2385                                 ret);
2386                         return ret;
2387                 }
2388
2389                 /*
2390                  * CRTO should always be greater or equal to CAP.TO, but some
2391                  * devices are known to get this wrong. Use the larger of the
2392                  * two values.
2393                  */
2394                 if (ctrl->ctrl_config & NVME_CC_CRIME)
2395                         ready_timeout = NVME_CRTO_CRIMT(crto);
2396                 else
2397                         ready_timeout = NVME_CRTO_CRWMT(crto);
2398
2399                 if (ready_timeout < timeout)
2400                         dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2401                                       crto, ctrl->cap);
2402                 else
2403                         timeout = ready_timeout;
2404         }
2405
2406         ctrl->ctrl_config |= NVME_CC_ENABLE;
2407         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2408         if (ret)
2409                 return ret;
2410         return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2411                                (timeout + 1) / 2, "initialisation");
2412 }
2413 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2414
2415 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2416 {
2417         __le64 ts;
2418         int ret;
2419
2420         if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2421                 return 0;
2422
2423         ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2424         ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2425                         NULL);
2426         if (ret)
2427                 dev_warn_once(ctrl->device,
2428                         "could not set timestamp (%d)\n", ret);
2429         return ret;
2430 }
2431
2432 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2433 {
2434         struct nvme_feat_host_behavior *host;
2435         u8 acre = 0, lbafee = 0;
2436         int ret;
2437
2438         /* Don't bother enabling the feature if retry delay is not reported */
2439         if (ctrl->crdt[0])
2440                 acre = NVME_ENABLE_ACRE;
2441         if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2442                 lbafee = NVME_ENABLE_LBAFEE;
2443
2444         if (!acre && !lbafee)
2445                 return 0;
2446
2447         host = kzalloc(sizeof(*host), GFP_KERNEL);
2448         if (!host)
2449                 return 0;
2450
2451         host->acre = acre;
2452         host->lbafee = lbafee;
2453         ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2454                                 host, sizeof(*host), NULL);
2455         kfree(host);
2456         return ret;
2457 }
2458
2459 /*
2460  * The function checks whether the given total (exlat + enlat) latency of
2461  * a power state allows the latter to be used as an APST transition target.
2462  * It does so by comparing the latency to the primary and secondary latency
2463  * tolerances defined by module params. If there's a match, the corresponding
2464  * timeout value is returned and the matching tolerance index (1 or 2) is
2465  * reported.
2466  */
2467 static bool nvme_apst_get_transition_time(u64 total_latency,
2468                 u64 *transition_time, unsigned *last_index)
2469 {
2470         if (total_latency <= apst_primary_latency_tol_us) {
2471                 if (*last_index == 1)
2472                         return false;
2473                 *last_index = 1;
2474                 *transition_time = apst_primary_timeout_ms;
2475                 return true;
2476         }
2477         if (apst_secondary_timeout_ms &&
2478                 total_latency <= apst_secondary_latency_tol_us) {
2479                 if (*last_index <= 2)
2480                         return false;
2481                 *last_index = 2;
2482                 *transition_time = apst_secondary_timeout_ms;
2483                 return true;
2484         }
2485         return false;
2486 }
2487
2488 /*
2489  * APST (Autonomous Power State Transition) lets us program a table of power
2490  * state transitions that the controller will perform automatically.
2491  *
2492  * Depending on module params, one of the two supported techniques will be used:
2493  *
2494  * - If the parameters provide explicit timeouts and tolerances, they will be
2495  *   used to build a table with up to 2 non-operational states to transition to.
2496  *   The default parameter values were selected based on the values used by
2497  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2498  *   regeneration of the APST table in the event of switching between external
2499  *   and battery power, the timeouts and tolerances reflect a compromise
2500  *   between values used by Microsoft for AC and battery scenarios.
2501  * - If not, we'll configure the table with a simple heuristic: we are willing
2502  *   to spend at most 2% of the time transitioning between power states.
2503  *   Therefore, when running in any given state, we will enter the next
2504  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2505  *   microseconds, as long as that state's exit latency is under the requested
2506  *   maximum latency.
2507  *
2508  * We will not autonomously enter any non-operational state for which the total
2509  * latency exceeds ps_max_latency_us.
2510  *
2511  * Users can set ps_max_latency_us to zero to turn off APST.
2512  */
2513 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2514 {
2515         struct nvme_feat_auto_pst *table;
2516         unsigned apste = 0;
2517         u64 max_lat_us = 0;
2518         __le64 target = 0;
2519         int max_ps = -1;
2520         int state;
2521         int ret;
2522         unsigned last_lt_index = UINT_MAX;
2523
2524         /*
2525          * If APST isn't supported or if we haven't been initialized yet,
2526          * then don't do anything.
2527          */
2528         if (!ctrl->apsta)
2529                 return 0;
2530
2531         if (ctrl->npss > 31) {
2532                 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2533                 return 0;
2534         }
2535
2536         table = kzalloc(sizeof(*table), GFP_KERNEL);
2537         if (!table)
2538                 return 0;
2539
2540         if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2541                 /* Turn off APST. */
2542                 dev_dbg(ctrl->device, "APST disabled\n");
2543                 goto done;
2544         }
2545
2546         /*
2547          * Walk through all states from lowest- to highest-power.
2548          * According to the spec, lower-numbered states use more power.  NPSS,
2549          * despite the name, is the index of the lowest-power state, not the
2550          * number of states.
2551          */
2552         for (state = (int)ctrl->npss; state >= 0; state--) {
2553                 u64 total_latency_us, exit_latency_us, transition_ms;
2554
2555                 if (target)
2556                         table->entries[state] = target;
2557
2558                 /*
2559                  * Don't allow transitions to the deepest state if it's quirked
2560                  * off.
2561                  */
2562                 if (state == ctrl->npss &&
2563                     (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2564                         continue;
2565
2566                 /*
2567                  * Is this state a useful non-operational state for higher-power
2568                  * states to autonomously transition to?
2569                  */
2570                 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2571                         continue;
2572
2573                 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2574                 if (exit_latency_us > ctrl->ps_max_latency_us)
2575                         continue;
2576
2577                 total_latency_us = exit_latency_us +
2578                         le32_to_cpu(ctrl->psd[state].entry_lat);
2579
2580                 /*
2581                  * This state is good. It can be used as the APST idle target
2582                  * for higher power states.
2583                  */
2584                 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2585                         if (!nvme_apst_get_transition_time(total_latency_us,
2586                                         &transition_ms, &last_lt_index))
2587                                 continue;
2588                 } else {
2589                         transition_ms = total_latency_us + 19;
2590                         do_div(transition_ms, 20);
2591                         if (transition_ms > (1 << 24) - 1)
2592                                 transition_ms = (1 << 24) - 1;
2593                 }
2594
2595                 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2596                 if (max_ps == -1)
2597                         max_ps = state;
2598                 if (total_latency_us > max_lat_us)
2599                         max_lat_us = total_latency_us;
2600         }
2601
2602         if (max_ps == -1)
2603                 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2604         else
2605                 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2606                         max_ps, max_lat_us, (int)sizeof(*table), table);
2607         apste = 1;
2608
2609 done:
2610         ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2611                                 table, sizeof(*table), NULL);
2612         if (ret)
2613                 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2614         kfree(table);
2615         return ret;
2616 }
2617
2618 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2619 {
2620         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2621         u64 latency;
2622
2623         switch (val) {
2624         case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2625         case PM_QOS_LATENCY_ANY:
2626                 latency = U64_MAX;
2627                 break;
2628
2629         default:
2630                 latency = val;
2631         }
2632
2633         if (ctrl->ps_max_latency_us != latency) {
2634                 ctrl->ps_max_latency_us = latency;
2635                 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2636                         nvme_configure_apst(ctrl);
2637         }
2638 }
2639
2640 struct nvme_core_quirk_entry {
2641         /*
2642          * NVMe model and firmware strings are padded with spaces.  For
2643          * simplicity, strings in the quirk table are padded with NULLs
2644          * instead.
2645          */
2646         u16 vid;
2647         const char *mn;
2648         const char *fr;
2649         unsigned long quirks;
2650 };
2651
2652 static const struct nvme_core_quirk_entry core_quirks[] = {
2653         {
2654                 /*
2655                  * This Toshiba device seems to die using any APST states.  See:
2656                  * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2657                  */
2658                 .vid = 0x1179,
2659                 .mn = "THNSF5256GPUK TOSHIBA",
2660                 .quirks = NVME_QUIRK_NO_APST,
2661         },
2662         {
2663                 /*
2664                  * This LiteON CL1-3D*-Q11 firmware version has a race
2665                  * condition associated with actions related to suspend to idle
2666                  * LiteON has resolved the problem in future firmware
2667                  */
2668                 .vid = 0x14a4,
2669                 .fr = "22301111",
2670                 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2671         },
2672         {
2673                 /*
2674                  * This Kioxia CD6-V Series / HPE PE8030 device times out and
2675                  * aborts I/O during any load, but more easily reproducible
2676                  * with discards (fstrim).
2677                  *
2678                  * The device is left in a state where it is also not possible
2679                  * to use "nvme set-feature" to disable APST, but booting with
2680                  * nvme_core.default_ps_max_latency=0 works.
2681                  */
2682                 .vid = 0x1e0f,
2683                 .mn = "KCD6XVUL6T40",
2684                 .quirks = NVME_QUIRK_NO_APST,
2685         },
2686         {
2687                 /*
2688                  * The external Samsung X5 SSD fails initialization without a
2689                  * delay before checking if it is ready and has a whole set of
2690                  * other problems.  To make this even more interesting, it
2691                  * shares the PCI ID with internal Samsung 970 Evo Plus that
2692                  * does not need or want these quirks.
2693                  */
2694                 .vid = 0x144d,
2695                 .mn = "Samsung Portable SSD X5",
2696                 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2697                           NVME_QUIRK_NO_DEEPEST_PS |
2698                           NVME_QUIRK_IGNORE_DEV_SUBNQN,
2699         }
2700 };
2701
2702 /* match is null-terminated but idstr is space-padded. */
2703 static bool string_matches(const char *idstr, const char *match, size_t len)
2704 {
2705         size_t matchlen;
2706
2707         if (!match)
2708                 return true;
2709
2710         matchlen = strlen(match);
2711         WARN_ON_ONCE(matchlen > len);
2712
2713         if (memcmp(idstr, match, matchlen))
2714                 return false;
2715
2716         for (; matchlen < len; matchlen++)
2717                 if (idstr[matchlen] != ' ')
2718                         return false;
2719
2720         return true;
2721 }
2722
2723 static bool quirk_matches(const struct nvme_id_ctrl *id,
2724                           const struct nvme_core_quirk_entry *q)
2725 {
2726         return q->vid == le16_to_cpu(id->vid) &&
2727                 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2728                 string_matches(id->fr, q->fr, sizeof(id->fr));
2729 }
2730
2731 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2732                 struct nvme_id_ctrl *id)
2733 {
2734         size_t nqnlen;
2735         int off;
2736
2737         if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2738                 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2739                 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2740                         strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2741                         return;
2742                 }
2743
2744                 if (ctrl->vs >= NVME_VS(1, 2, 1))
2745                         dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2746         }
2747
2748         /*
2749          * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2750          * Base Specification 2.0.  It is slightly different from the format
2751          * specified there due to historic reasons, and we can't change it now.
2752          */
2753         off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2754                         "nqn.2014.08.org.nvmexpress:%04x%04x",
2755                         le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2756         memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2757         off += sizeof(id->sn);
2758         memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2759         off += sizeof(id->mn);
2760         memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2761 }
2762
2763 static void nvme_release_subsystem(struct device *dev)
2764 {
2765         struct nvme_subsystem *subsys =
2766                 container_of(dev, struct nvme_subsystem, dev);
2767
2768         if (subsys->instance >= 0)
2769                 ida_free(&nvme_instance_ida, subsys->instance);
2770         kfree(subsys);
2771 }
2772
2773 static void nvme_destroy_subsystem(struct kref *ref)
2774 {
2775         struct nvme_subsystem *subsys =
2776                         container_of(ref, struct nvme_subsystem, ref);
2777
2778         mutex_lock(&nvme_subsystems_lock);
2779         list_del(&subsys->entry);
2780         mutex_unlock(&nvme_subsystems_lock);
2781
2782         ida_destroy(&subsys->ns_ida);
2783         device_del(&subsys->dev);
2784         put_device(&subsys->dev);
2785 }
2786
2787 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2788 {
2789         kref_put(&subsys->ref, nvme_destroy_subsystem);
2790 }
2791
2792 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2793 {
2794         struct nvme_subsystem *subsys;
2795
2796         lockdep_assert_held(&nvme_subsystems_lock);
2797
2798         /*
2799          * Fail matches for discovery subsystems. This results
2800          * in each discovery controller bound to a unique subsystem.
2801          * This avoids issues with validating controller values
2802          * that can only be true when there is a single unique subsystem.
2803          * There may be multiple and completely independent entities
2804          * that provide discovery controllers.
2805          */
2806         if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2807                 return NULL;
2808
2809         list_for_each_entry(subsys, &nvme_subsystems, entry) {
2810                 if (strcmp(subsys->subnqn, subsysnqn))
2811                         continue;
2812                 if (!kref_get_unless_zero(&subsys->ref))
2813                         continue;
2814                 return subsys;
2815         }
2816
2817         return NULL;
2818 }
2819
2820 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2821 {
2822         return ctrl->opts && ctrl->opts->discovery_nqn;
2823 }
2824
2825 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2826                 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2827 {
2828         struct nvme_ctrl *tmp;
2829
2830         lockdep_assert_held(&nvme_subsystems_lock);
2831
2832         list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2833                 if (nvme_state_terminal(tmp))
2834                         continue;
2835
2836                 if (tmp->cntlid == ctrl->cntlid) {
2837                         dev_err(ctrl->device,
2838                                 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2839                                 ctrl->cntlid, dev_name(tmp->device),
2840                                 subsys->subnqn);
2841                         return false;
2842                 }
2843
2844                 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2845                     nvme_discovery_ctrl(ctrl))
2846                         continue;
2847
2848                 dev_err(ctrl->device,
2849                         "Subsystem does not support multiple controllers\n");
2850                 return false;
2851         }
2852
2853         return true;
2854 }
2855
2856 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2857 {
2858         struct nvme_subsystem *subsys, *found;
2859         int ret;
2860
2861         subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2862         if (!subsys)
2863                 return -ENOMEM;
2864
2865         subsys->instance = -1;
2866         mutex_init(&subsys->lock);
2867         kref_init(&subsys->ref);
2868         INIT_LIST_HEAD(&subsys->ctrls);
2869         INIT_LIST_HEAD(&subsys->nsheads);
2870         nvme_init_subnqn(subsys, ctrl, id);
2871         memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2872         memcpy(subsys->model, id->mn, sizeof(subsys->model));
2873         subsys->vendor_id = le16_to_cpu(id->vid);
2874         subsys->cmic = id->cmic;
2875
2876         /* Versions prior to 1.4 don't necessarily report a valid type */
2877         if (id->cntrltype == NVME_CTRL_DISC ||
2878             !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2879                 subsys->subtype = NVME_NQN_DISC;
2880         else
2881                 subsys->subtype = NVME_NQN_NVME;
2882
2883         if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2884                 dev_err(ctrl->device,
2885                         "Subsystem %s is not a discovery controller",
2886                         subsys->subnqn);
2887                 kfree(subsys);
2888                 return -EINVAL;
2889         }
2890         subsys->awupf = le16_to_cpu(id->awupf);
2891         nvme_mpath_default_iopolicy(subsys);
2892
2893         subsys->dev.class = &nvme_subsys_class;
2894         subsys->dev.release = nvme_release_subsystem;
2895         subsys->dev.groups = nvme_subsys_attrs_groups;
2896         dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2897         device_initialize(&subsys->dev);
2898
2899         mutex_lock(&nvme_subsystems_lock);
2900         found = __nvme_find_get_subsystem(subsys->subnqn);
2901         if (found) {
2902                 put_device(&subsys->dev);
2903                 subsys = found;
2904
2905                 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2906                         ret = -EINVAL;
2907                         goto out_put_subsystem;
2908                 }
2909         } else {
2910                 ret = device_add(&subsys->dev);
2911                 if (ret) {
2912                         dev_err(ctrl->device,
2913                                 "failed to register subsystem device.\n");
2914                         put_device(&subsys->dev);
2915                         goto out_unlock;
2916                 }
2917                 ida_init(&subsys->ns_ida);
2918                 list_add_tail(&subsys->entry, &nvme_subsystems);
2919         }
2920
2921         ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2922                                 dev_name(ctrl->device));
2923         if (ret) {
2924                 dev_err(ctrl->device,
2925                         "failed to create sysfs link from subsystem.\n");
2926                 goto out_put_subsystem;
2927         }
2928
2929         if (!found)
2930                 subsys->instance = ctrl->instance;
2931         ctrl->subsys = subsys;
2932         list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2933         mutex_unlock(&nvme_subsystems_lock);
2934         return 0;
2935
2936 out_put_subsystem:
2937         nvme_put_subsystem(subsys);
2938 out_unlock:
2939         mutex_unlock(&nvme_subsystems_lock);
2940         return ret;
2941 }
2942
2943 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2944                 void *log, size_t size, u64 offset)
2945 {
2946         struct nvme_command c = { };
2947         u32 dwlen = nvme_bytes_to_numd(size);
2948
2949         c.get_log_page.opcode = nvme_admin_get_log_page;
2950         c.get_log_page.nsid = cpu_to_le32(nsid);
2951         c.get_log_page.lid = log_page;
2952         c.get_log_page.lsp = lsp;
2953         c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2954         c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2955         c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2956         c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2957         c.get_log_page.csi = csi;
2958
2959         return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2960 }
2961
2962 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2963                                 struct nvme_effects_log **log)
2964 {
2965         struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi);
2966         int ret;
2967
2968         if (cel)
2969                 goto out;
2970
2971         cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2972         if (!cel)
2973                 return -ENOMEM;
2974
2975         ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2976                         cel, sizeof(*cel), 0);
2977         if (ret) {
2978                 kfree(cel);
2979                 return ret;
2980         }
2981
2982         xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2983 out:
2984         *log = cel;
2985         return 0;
2986 }
2987
2988 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2989 {
2990         u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2991
2992         if (check_shl_overflow(1U, units + page_shift - 9, &val))
2993                 return UINT_MAX;
2994         return val;
2995 }
2996
2997 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2998 {
2999         struct nvme_command c = { };
3000         struct nvme_id_ctrl_nvm *id;
3001         int ret;
3002
3003         /*
3004          * Even though NVMe spec explicitly states that MDTS is not applicable
3005          * to the write-zeroes, we are cautious and limit the size to the
3006          * controllers max_hw_sectors value, which is based on the MDTS field
3007          * and possibly other limiting factors.
3008          */
3009         if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3010             !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3011                 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3012         else
3013                 ctrl->max_zeroes_sectors = 0;
3014
3015         if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3016             nvme_ctrl_limited_cns(ctrl) ||
3017             test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3018                 return 0;
3019
3020         id = kzalloc(sizeof(*id), GFP_KERNEL);
3021         if (!id)
3022                 return -ENOMEM;
3023
3024         c.identify.opcode = nvme_admin_identify;
3025         c.identify.cns = NVME_ID_CNS_CS_CTRL;
3026         c.identify.csi = NVME_CSI_NVM;
3027
3028         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3029         if (ret)
3030                 goto free_data;
3031
3032         ctrl->dmrl = id->dmrl;
3033         ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3034         if (id->wzsl)
3035                 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3036
3037 free_data:
3038         if (ret > 0)
3039                 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3040         kfree(id);
3041         return ret;
3042 }
3043
3044 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3045 {
3046         struct nvme_effects_log *log = ctrl->effects;
3047
3048         log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3049                                                 NVME_CMD_EFFECTS_NCC |
3050                                                 NVME_CMD_EFFECTS_CSE_MASK);
3051         log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3052                                                 NVME_CMD_EFFECTS_CSE_MASK);
3053
3054         /*
3055          * The spec says the result of a security receive command depends on
3056          * the previous security send command. As such, many vendors log this
3057          * command as one to submitted only when no other commands to the same
3058          * namespace are outstanding. The intention is to tell the host to
3059          * prevent mixing security send and receive.
3060          *
3061          * This driver can only enforce such exclusive access against IO
3062          * queues, though. We are not readily able to enforce such a rule for
3063          * two commands to the admin queue, which is the only queue that
3064          * matters for this command.
3065          *
3066          * Rather than blindly freezing the IO queues for this effect that
3067          * doesn't even apply to IO, mask it off.
3068          */
3069         log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3070
3071         log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3072         log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3073         log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3074 }
3075
3076 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3077 {
3078         int ret = 0;
3079
3080         if (ctrl->effects)
3081                 return 0;
3082
3083         if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3084                 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3085                 if (ret < 0)
3086                         return ret;
3087         }
3088
3089         if (!ctrl->effects) {
3090                 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3091                 if (!ctrl->effects)
3092                         return -ENOMEM;
3093                 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3094         }
3095
3096         nvme_init_known_nvm_effects(ctrl);
3097         return 0;
3098 }
3099
3100 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3101 {
3102         /*
3103          * In fabrics we need to verify the cntlid matches the
3104          * admin connect
3105          */
3106         if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3107                 dev_err(ctrl->device,
3108                         "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3109                         ctrl->cntlid, le16_to_cpu(id->cntlid));
3110                 return -EINVAL;
3111         }
3112
3113         if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3114                 dev_err(ctrl->device,
3115                         "keep-alive support is mandatory for fabrics\n");
3116                 return -EINVAL;
3117         }
3118
3119         if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3120                 dev_err(ctrl->device,
3121                         "I/O queue command capsule supported size %d < 4\n",
3122                         ctrl->ioccsz);
3123                 return -EINVAL;
3124         }
3125
3126         if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3127                 dev_err(ctrl->device,
3128                         "I/O queue response capsule supported size %d < 1\n",
3129                         ctrl->iorcsz);
3130                 return -EINVAL;
3131         }
3132
3133         if (!ctrl->maxcmd) {
3134                 dev_err(ctrl->device, "Maximum outstanding commands is 0\n");
3135                 return -EINVAL;
3136         }
3137
3138         return 0;
3139 }
3140
3141 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3142 {
3143         struct queue_limits lim;
3144         struct nvme_id_ctrl *id;
3145         u32 max_hw_sectors;
3146         bool prev_apst_enabled;
3147         int ret;
3148
3149         ret = nvme_identify_ctrl(ctrl, &id);
3150         if (ret) {
3151                 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3152                 return -EIO;
3153         }
3154
3155         if (!(ctrl->ops->flags & NVME_F_FABRICS))
3156                 ctrl->cntlid = le16_to_cpu(id->cntlid);
3157
3158         if (!ctrl->identified) {
3159                 unsigned int i;
3160
3161                 /*
3162                  * Check for quirks.  Quirk can depend on firmware version,
3163                  * so, in principle, the set of quirks present can change
3164                  * across a reset.  As a possible future enhancement, we
3165                  * could re-scan for quirks every time we reinitialize
3166                  * the device, but we'd have to make sure that the driver
3167                  * behaves intelligently if the quirks change.
3168                  */
3169                 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3170                         if (quirk_matches(id, &core_quirks[i]))
3171                                 ctrl->quirks |= core_quirks[i].quirks;
3172                 }
3173
3174                 ret = nvme_init_subsystem(ctrl, id);
3175                 if (ret)
3176                         goto out_free;
3177
3178                 ret = nvme_init_effects(ctrl, id);
3179                 if (ret)
3180                         goto out_free;
3181         }
3182         memcpy(ctrl->subsys->firmware_rev, id->fr,
3183                sizeof(ctrl->subsys->firmware_rev));
3184
3185         if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3186                 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3187                 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3188         }
3189
3190         ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3191         ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3192         ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3193
3194         ctrl->oacs = le16_to_cpu(id->oacs);
3195         ctrl->oncs = le16_to_cpu(id->oncs);
3196         ctrl->mtfa = le16_to_cpu(id->mtfa);
3197         ctrl->oaes = le32_to_cpu(id->oaes);
3198         ctrl->wctemp = le16_to_cpu(id->wctemp);
3199         ctrl->cctemp = le16_to_cpu(id->cctemp);
3200
3201         atomic_set(&ctrl->abort_limit, id->acl + 1);
3202         ctrl->vwc = id->vwc;
3203         if (id->mdts)
3204                 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3205         else
3206                 max_hw_sectors = UINT_MAX;
3207         ctrl->max_hw_sectors =
3208                 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3209
3210         lim = queue_limits_start_update(ctrl->admin_q);
3211         nvme_set_ctrl_limits(ctrl, &lim);
3212         ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3213         if (ret)
3214                 goto out_free;
3215
3216         ctrl->sgls = le32_to_cpu(id->sgls);
3217         ctrl->kas = le16_to_cpu(id->kas);
3218         ctrl->max_namespaces = le32_to_cpu(id->mnan);
3219         ctrl->ctratt = le32_to_cpu(id->ctratt);
3220
3221         ctrl->cntrltype = id->cntrltype;
3222         ctrl->dctype = id->dctype;
3223
3224         if (id->rtd3e) {
3225                 /* us -> s */
3226                 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3227
3228                 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3229                                                  shutdown_timeout, 60);
3230
3231                 if (ctrl->shutdown_timeout != shutdown_timeout)
3232                         dev_info(ctrl->device,
3233                                  "D3 entry latency set to %u seconds\n",
3234                                  ctrl->shutdown_timeout);
3235         } else
3236                 ctrl->shutdown_timeout = shutdown_timeout;
3237
3238         ctrl->npss = id->npss;
3239         ctrl->apsta = id->apsta;
3240         prev_apst_enabled = ctrl->apst_enabled;
3241         if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3242                 if (force_apst && id->apsta) {
3243                         dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3244                         ctrl->apst_enabled = true;
3245                 } else {
3246                         ctrl->apst_enabled = false;
3247                 }
3248         } else {
3249                 ctrl->apst_enabled = id->apsta;
3250         }
3251         memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3252
3253         if (ctrl->ops->flags & NVME_F_FABRICS) {
3254                 ctrl->icdoff = le16_to_cpu(id->icdoff);
3255                 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3256                 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3257                 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3258
3259                 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3260                 if (ret)
3261                         goto out_free;
3262         } else {
3263                 ctrl->hmpre = le32_to_cpu(id->hmpre);
3264                 ctrl->hmmin = le32_to_cpu(id->hmmin);
3265                 ctrl->hmminds = le32_to_cpu(id->hmminds);
3266                 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3267         }
3268
3269         ret = nvme_mpath_init_identify(ctrl, id);
3270         if (ret < 0)
3271                 goto out_free;
3272
3273         if (ctrl->apst_enabled && !prev_apst_enabled)
3274                 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3275         else if (!ctrl->apst_enabled && prev_apst_enabled)
3276                 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3277
3278 out_free:
3279         kfree(id);
3280         return ret;
3281 }
3282
3283 /*
3284  * Initialize the cached copies of the Identify data and various controller
3285  * register in our nvme_ctrl structure.  This should be called as soon as
3286  * the admin queue is fully up and running.
3287  */
3288 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3289 {
3290         int ret;
3291
3292         ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3293         if (ret) {
3294                 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3295                 return ret;
3296         }
3297
3298         ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3299
3300         if (ctrl->vs >= NVME_VS(1, 1, 0))
3301                 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3302
3303         ret = nvme_init_identify(ctrl);
3304         if (ret)
3305                 return ret;
3306
3307         ret = nvme_configure_apst(ctrl);
3308         if (ret < 0)
3309                 return ret;
3310
3311         ret = nvme_configure_timestamp(ctrl);
3312         if (ret < 0)
3313                 return ret;
3314
3315         ret = nvme_configure_host_options(ctrl);
3316         if (ret < 0)
3317                 return ret;
3318
3319         nvme_configure_opal(ctrl, was_suspended);
3320
3321         if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3322                 /*
3323                  * Do not return errors unless we are in a controller reset,
3324                  * the controller works perfectly fine without hwmon.
3325                  */
3326                 ret = nvme_hwmon_init(ctrl);
3327                 if (ret == -EINTR)
3328                         return ret;
3329         }
3330
3331         clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3332         ctrl->identified = true;
3333
3334         nvme_start_keep_alive(ctrl);
3335
3336         return 0;
3337 }
3338 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3339
3340 static int nvme_dev_open(struct inode *inode, struct file *file)
3341 {
3342         struct nvme_ctrl *ctrl =
3343                 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3344
3345         switch (nvme_ctrl_state(ctrl)) {
3346         case NVME_CTRL_LIVE:
3347                 break;
3348         default:
3349                 return -EWOULDBLOCK;
3350         }
3351
3352         nvme_get_ctrl(ctrl);
3353         if (!try_module_get(ctrl->ops->module)) {
3354                 nvme_put_ctrl(ctrl);
3355                 return -EINVAL;
3356         }
3357
3358         file->private_data = ctrl;
3359         return 0;
3360 }
3361
3362 static int nvme_dev_release(struct inode *inode, struct file *file)
3363 {
3364         struct nvme_ctrl *ctrl =
3365                 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3366
3367         module_put(ctrl->ops->module);
3368         nvme_put_ctrl(ctrl);
3369         return 0;
3370 }
3371
3372 static const struct file_operations nvme_dev_fops = {
3373         .owner          = THIS_MODULE,
3374         .open           = nvme_dev_open,
3375         .release        = nvme_dev_release,
3376         .unlocked_ioctl = nvme_dev_ioctl,
3377         .compat_ioctl   = compat_ptr_ioctl,
3378         .uring_cmd      = nvme_dev_uring_cmd,
3379 };
3380
3381 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3382                 unsigned nsid)
3383 {
3384         struct nvme_ns_head *h;
3385
3386         lockdep_assert_held(&ctrl->subsys->lock);
3387
3388         list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3389                 /*
3390                  * Private namespaces can share NSIDs under some conditions.
3391                  * In that case we can't use the same ns_head for namespaces
3392                  * with the same NSID.
3393                  */
3394                 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3395                         continue;
3396                 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3397                         return h;
3398         }
3399
3400         return NULL;
3401 }
3402
3403 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3404                 struct nvme_ns_ids *ids)
3405 {
3406         bool has_uuid = !uuid_is_null(&ids->uuid);
3407         bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3408         bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3409         struct nvme_ns_head *h;
3410
3411         lockdep_assert_held(&subsys->lock);
3412
3413         list_for_each_entry(h, &subsys->nsheads, entry) {
3414                 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3415                         return -EINVAL;
3416                 if (has_nguid &&
3417                     memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3418                         return -EINVAL;
3419                 if (has_eui64 &&
3420                     memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3421                         return -EINVAL;
3422         }
3423
3424         return 0;
3425 }
3426
3427 static void nvme_cdev_rel(struct device *dev)
3428 {
3429         ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3430 }
3431
3432 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3433 {
3434         cdev_device_del(cdev, cdev_device);
3435         put_device(cdev_device);
3436 }
3437
3438 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3439                 const struct file_operations *fops, struct module *owner)
3440 {
3441         int minor, ret;
3442
3443         minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3444         if (minor < 0)
3445                 return minor;
3446         cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3447         cdev_device->class = &nvme_ns_chr_class;
3448         cdev_device->release = nvme_cdev_rel;
3449         device_initialize(cdev_device);
3450         cdev_init(cdev, fops);
3451         cdev->owner = owner;
3452         ret = cdev_device_add(cdev, cdev_device);
3453         if (ret)
3454                 put_device(cdev_device);
3455
3456         return ret;
3457 }
3458
3459 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3460 {
3461         return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3462 }
3463
3464 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3465 {
3466         nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3467         return 0;
3468 }
3469
3470 static const struct file_operations nvme_ns_chr_fops = {
3471         .owner          = THIS_MODULE,
3472         .open           = nvme_ns_chr_open,
3473         .release        = nvme_ns_chr_release,
3474         .unlocked_ioctl = nvme_ns_chr_ioctl,
3475         .compat_ioctl   = compat_ptr_ioctl,
3476         .uring_cmd      = nvme_ns_chr_uring_cmd,
3477         .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3478 };
3479
3480 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3481 {
3482         int ret;
3483
3484         ns->cdev_device.parent = ns->ctrl->device;
3485         ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3486                            ns->ctrl->instance, ns->head->instance);
3487         if (ret)
3488                 return ret;
3489
3490         return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3491                              ns->ctrl->ops->module);
3492 }
3493
3494 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3495                 struct nvme_ns_info *info)
3496 {
3497         struct nvme_ns_head *head;
3498         size_t size = sizeof(*head);
3499         int ret = -ENOMEM;
3500
3501 #ifdef CONFIG_NVME_MULTIPATH
3502         size += num_possible_nodes() * sizeof(struct nvme_ns *);
3503 #endif
3504
3505         head = kzalloc(size, GFP_KERNEL);
3506         if (!head)
3507                 goto out;
3508         ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3509         if (ret < 0)
3510                 goto out_free_head;
3511         head->instance = ret;
3512         INIT_LIST_HEAD(&head->list);
3513         ret = init_srcu_struct(&head->srcu);
3514         if (ret)
3515                 goto out_ida_remove;
3516         head->subsys = ctrl->subsys;
3517         head->ns_id = info->nsid;
3518         head->ids = info->ids;
3519         head->shared = info->is_shared;
3520         ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3521         ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3522         kref_init(&head->ref);
3523
3524         if (head->ids.csi) {
3525                 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3526                 if (ret)
3527                         goto out_cleanup_srcu;
3528         } else
3529                 head->effects = ctrl->effects;
3530
3531         ret = nvme_mpath_alloc_disk(ctrl, head);
3532         if (ret)
3533                 goto out_cleanup_srcu;
3534
3535         list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3536
3537         kref_get(&ctrl->subsys->ref);
3538
3539         return head;
3540 out_cleanup_srcu:
3541         cleanup_srcu_struct(&head->srcu);
3542 out_ida_remove:
3543         ida_free(&ctrl->subsys->ns_ida, head->instance);
3544 out_free_head:
3545         kfree(head);
3546 out:
3547         if (ret > 0)
3548                 ret = blk_status_to_errno(nvme_error_status(ret));
3549         return ERR_PTR(ret);
3550 }
3551
3552 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3553                 struct nvme_ns_ids *ids)
3554 {
3555         struct nvme_subsystem *s;
3556         int ret = 0;
3557
3558         /*
3559          * Note that this check is racy as we try to avoid holding the global
3560          * lock over the whole ns_head creation.  But it is only intended as
3561          * a sanity check anyway.
3562          */
3563         mutex_lock(&nvme_subsystems_lock);
3564         list_for_each_entry(s, &nvme_subsystems, entry) {
3565                 if (s == this)
3566                         continue;
3567                 mutex_lock(&s->lock);
3568                 ret = nvme_subsys_check_duplicate_ids(s, ids);
3569                 mutex_unlock(&s->lock);
3570                 if (ret)
3571                         break;
3572         }
3573         mutex_unlock(&nvme_subsystems_lock);
3574
3575         return ret;
3576 }
3577
3578 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3579 {
3580         struct nvme_ctrl *ctrl = ns->ctrl;
3581         struct nvme_ns_head *head = NULL;
3582         int ret;
3583
3584         ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3585         if (ret) {
3586                 /*
3587                  * We've found two different namespaces on two different
3588                  * subsystems that report the same ID.  This is pretty nasty
3589                  * for anything that actually requires unique device
3590                  * identification.  In the kernel we need this for multipathing,
3591                  * and in user space the /dev/disk/by-id/ links rely on it.
3592                  *
3593                  * If the device also claims to be multi-path capable back off
3594                  * here now and refuse the probe the second device as this is a
3595                  * recipe for data corruption.  If not this is probably a
3596                  * cheap consumer device if on the PCIe bus, so let the user
3597                  * proceed and use the shiny toy, but warn that with changing
3598                  * probing order (which due to our async probing could just be
3599                  * device taking longer to startup) the other device could show
3600                  * up at any time.
3601                  */
3602                 nvme_print_device_info(ctrl);
3603                 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3604                     ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3605                      info->is_shared)) {
3606                         dev_err(ctrl->device,
3607                                 "ignoring nsid %d because of duplicate IDs\n",
3608                                 info->nsid);
3609                         return ret;
3610                 }
3611
3612                 dev_err(ctrl->device,
3613                         "clearing duplicate IDs for nsid %d\n", info->nsid);
3614                 dev_err(ctrl->device,
3615                         "use of /dev/disk/by-id/ may cause data corruption\n");
3616                 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3617                 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3618                 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3619                 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3620         }
3621
3622         mutex_lock(&ctrl->subsys->lock);
3623         head = nvme_find_ns_head(ctrl, info->nsid);
3624         if (!head) {
3625                 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3626                 if (ret) {
3627                         dev_err(ctrl->device,
3628                                 "duplicate IDs in subsystem for nsid %d\n",
3629                                 info->nsid);
3630                         goto out_unlock;
3631                 }
3632                 head = nvme_alloc_ns_head(ctrl, info);
3633                 if (IS_ERR(head)) {
3634                         ret = PTR_ERR(head);
3635                         goto out_unlock;
3636                 }
3637         } else {
3638                 ret = -EINVAL;
3639                 if (!info->is_shared || !head->shared) {
3640                         dev_err(ctrl->device,
3641                                 "Duplicate unshared namespace %d\n",
3642                                 info->nsid);
3643                         goto out_put_ns_head;
3644                 }
3645                 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3646                         dev_err(ctrl->device,
3647                                 "IDs don't match for shared namespace %d\n",
3648                                         info->nsid);
3649                         goto out_put_ns_head;
3650                 }
3651
3652                 if (!multipath) {
3653                         dev_warn(ctrl->device,
3654                                 "Found shared namespace %d, but multipathing not supported.\n",
3655                                 info->nsid);
3656                         dev_warn_once(ctrl->device,
3657                                 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
3658                 }
3659         }
3660
3661         list_add_tail_rcu(&ns->siblings, &head->list);
3662         ns->head = head;
3663         mutex_unlock(&ctrl->subsys->lock);
3664         return 0;
3665
3666 out_put_ns_head:
3667         nvme_put_ns_head(head);
3668 out_unlock:
3669         mutex_unlock(&ctrl->subsys->lock);
3670         return ret;
3671 }
3672
3673 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3674 {
3675         struct nvme_ns *ns, *ret = NULL;
3676
3677         down_read(&ctrl->namespaces_rwsem);
3678         list_for_each_entry(ns, &ctrl->namespaces, list) {
3679                 if (ns->head->ns_id == nsid) {
3680                         if (!nvme_get_ns(ns))
3681                                 continue;
3682                         ret = ns;
3683                         break;
3684                 }
3685                 if (ns->head->ns_id > nsid)
3686                         break;
3687         }
3688         up_read(&ctrl->namespaces_rwsem);
3689         return ret;
3690 }
3691 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3692
3693 /*
3694  * Add the namespace to the controller list while keeping the list ordered.
3695  */
3696 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3697 {
3698         struct nvme_ns *tmp;
3699
3700         list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3701                 if (tmp->head->ns_id < ns->head->ns_id) {
3702                         list_add(&ns->list, &tmp->list);
3703                         return;
3704                 }
3705         }
3706         list_add(&ns->list, &ns->ctrl->namespaces);
3707 }
3708
3709 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3710 {
3711         struct nvme_ns *ns;
3712         struct gendisk *disk;
3713         int node = ctrl->numa_node;
3714
3715         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3716         if (!ns)
3717                 return;
3718
3719         disk = blk_mq_alloc_disk(ctrl->tagset, NULL, ns);
3720         if (IS_ERR(disk))
3721                 goto out_free_ns;
3722         disk->fops = &nvme_bdev_ops;
3723         disk->private_data = ns;
3724
3725         ns->disk = disk;
3726         ns->queue = disk->queue;
3727         ns->passthru_err_log_enabled = false;
3728
3729         if (ctrl->opts && ctrl->opts->data_digest)
3730                 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3731
3732         blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3733         if (ctrl->ops->supports_pci_p2pdma &&
3734             ctrl->ops->supports_pci_p2pdma(ctrl))
3735                 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3736
3737         ns->ctrl = ctrl;
3738         kref_init(&ns->kref);
3739
3740         if (nvme_init_ns_head(ns, info))
3741                 goto out_cleanup_disk;
3742
3743         /*
3744          * If multipathing is enabled, the device name for all disks and not
3745          * just those that represent shared namespaces needs to be based on the
3746          * subsystem instance.  Using the controller instance for private
3747          * namespaces could lead to naming collisions between shared and private
3748          * namespaces if they don't use a common numbering scheme.
3749          *
3750          * If multipathing is not enabled, disk names must use the controller
3751          * instance as shared namespaces will show up as multiple block
3752          * devices.
3753          */
3754         if (nvme_ns_head_multipath(ns->head)) {
3755                 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3756                         ctrl->instance, ns->head->instance);
3757                 disk->flags |= GENHD_FL_HIDDEN;
3758         } else if (multipath) {
3759                 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3760                         ns->head->instance);
3761         } else {
3762                 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3763                         ns->head->instance);
3764         }
3765
3766         if (nvme_update_ns_info(ns, info))
3767                 goto out_unlink_ns;
3768
3769         down_write(&ctrl->namespaces_rwsem);
3770         /*
3771          * Ensure that no namespaces are added to the ctrl list after the queues
3772          * are frozen, thereby avoiding a deadlock between scan and reset.
3773          */
3774         if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3775                 up_write(&ctrl->namespaces_rwsem);
3776                 goto out_unlink_ns;
3777         }
3778         nvme_ns_add_to_ctrl_list(ns);
3779         up_write(&ctrl->namespaces_rwsem);
3780         nvme_get_ctrl(ctrl);
3781
3782         if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3783                 goto out_cleanup_ns_from_list;
3784
3785         if (!nvme_ns_head_multipath(ns->head))
3786                 nvme_add_ns_cdev(ns);
3787
3788         nvme_mpath_add_disk(ns, info->anagrpid);
3789         nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3790
3791         /*
3792          * Set ns->disk->device->driver_data to ns so we can access
3793          * ns->logging_enabled in nvme_passthru_err_log_enabled_store() and
3794          * nvme_passthru_err_log_enabled_show().
3795          */
3796         dev_set_drvdata(disk_to_dev(ns->disk), ns);
3797
3798         return;
3799
3800  out_cleanup_ns_from_list:
3801         nvme_put_ctrl(ctrl);
3802         down_write(&ctrl->namespaces_rwsem);
3803         list_del_init(&ns->list);
3804         up_write(&ctrl->namespaces_rwsem);
3805  out_unlink_ns:
3806         mutex_lock(&ctrl->subsys->lock);
3807         list_del_rcu(&ns->siblings);
3808         if (list_empty(&ns->head->list))
3809                 list_del_init(&ns->head->entry);
3810         mutex_unlock(&ctrl->subsys->lock);
3811         nvme_put_ns_head(ns->head);
3812  out_cleanup_disk:
3813         put_disk(disk);
3814  out_free_ns:
3815         kfree(ns);
3816 }
3817
3818 static void nvme_ns_remove(struct nvme_ns *ns)
3819 {
3820         bool last_path = false;
3821
3822         if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3823                 return;
3824
3825         clear_bit(NVME_NS_READY, &ns->flags);
3826         set_capacity(ns->disk, 0);
3827         nvme_fault_inject_fini(&ns->fault_inject);
3828
3829         /*
3830          * Ensure that !NVME_NS_READY is seen by other threads to prevent
3831          * this ns going back into current_path.
3832          */
3833         synchronize_srcu(&ns->head->srcu);
3834
3835         /* wait for concurrent submissions */
3836         if (nvme_mpath_clear_current_path(ns))
3837                 synchronize_srcu(&ns->head->srcu);
3838
3839         mutex_lock(&ns->ctrl->subsys->lock);
3840         list_del_rcu(&ns->siblings);
3841         if (list_empty(&ns->head->list)) {
3842                 list_del_init(&ns->head->entry);
3843                 last_path = true;
3844         }
3845         mutex_unlock(&ns->ctrl->subsys->lock);
3846
3847         /* guarantee not available in head->list */
3848         synchronize_srcu(&ns->head->srcu);
3849
3850         if (!nvme_ns_head_multipath(ns->head))
3851                 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3852         del_gendisk(ns->disk);
3853
3854         down_write(&ns->ctrl->namespaces_rwsem);
3855         list_del_init(&ns->list);
3856         up_write(&ns->ctrl->namespaces_rwsem);
3857
3858         if (last_path)
3859                 nvme_mpath_shutdown_disk(ns->head);
3860         nvme_put_ns(ns);
3861 }
3862
3863 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3864 {
3865         struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3866
3867         if (ns) {
3868                 nvme_ns_remove(ns);
3869                 nvme_put_ns(ns);
3870         }
3871 }
3872
3873 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3874 {
3875         int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3876
3877         if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3878                 dev_err(ns->ctrl->device,
3879                         "identifiers changed for nsid %d\n", ns->head->ns_id);
3880                 goto out;
3881         }
3882
3883         ret = nvme_update_ns_info(ns, info);
3884 out:
3885         /*
3886          * Only remove the namespace if we got a fatal error back from the
3887          * device, otherwise ignore the error and just move on.
3888          *
3889          * TODO: we should probably schedule a delayed retry here.
3890          */
3891         if (ret > 0 && (ret & NVME_SC_DNR))
3892                 nvme_ns_remove(ns);
3893 }
3894
3895 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3896 {
3897         struct nvme_ns_info info = { .nsid = nsid };
3898         struct nvme_ns *ns;
3899         int ret;
3900
3901         if (nvme_identify_ns_descs(ctrl, &info))
3902                 return;
3903
3904         if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3905                 dev_warn(ctrl->device,
3906                         "command set not reported for nsid: %d\n", nsid);
3907                 return;
3908         }
3909
3910         /*
3911          * If available try to use the Command Set Idependent Identify Namespace
3912          * data structure to find all the generic information that is needed to
3913          * set up a namespace.  If not fall back to the legacy version.
3914          */
3915         if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3916             (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3917                 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3918         else
3919                 ret = nvme_ns_info_from_identify(ctrl, &info);
3920
3921         if (info.is_removed)
3922                 nvme_ns_remove_by_nsid(ctrl, nsid);
3923
3924         /*
3925          * Ignore the namespace if it is not ready. We will get an AEN once it
3926          * becomes ready and restart the scan.
3927          */
3928         if (ret || !info.is_ready)
3929                 return;
3930
3931         ns = nvme_find_get_ns(ctrl, nsid);
3932         if (ns) {
3933                 nvme_validate_ns(ns, &info);
3934                 nvme_put_ns(ns);
3935         } else {
3936                 nvme_alloc_ns(ctrl, &info);
3937         }
3938 }
3939
3940 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3941                                         unsigned nsid)
3942 {
3943         struct nvme_ns *ns, *next;
3944         LIST_HEAD(rm_list);
3945
3946         down_write(&ctrl->namespaces_rwsem);
3947         list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3948                 if (ns->head->ns_id > nsid)
3949                         list_move_tail(&ns->list, &rm_list);
3950         }
3951         up_write(&ctrl->namespaces_rwsem);
3952
3953         list_for_each_entry_safe(ns, next, &rm_list, list)
3954                 nvme_ns_remove(ns);
3955
3956 }
3957
3958 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3959 {
3960         const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3961         __le32 *ns_list;
3962         u32 prev = 0;
3963         int ret = 0, i;
3964
3965         ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3966         if (!ns_list)
3967                 return -ENOMEM;
3968
3969         for (;;) {
3970                 struct nvme_command cmd = {
3971                         .identify.opcode        = nvme_admin_identify,
3972                         .identify.cns           = NVME_ID_CNS_NS_ACTIVE_LIST,
3973                         .identify.nsid          = cpu_to_le32(prev),
3974                 };
3975
3976                 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3977                                             NVME_IDENTIFY_DATA_SIZE);
3978                 if (ret) {
3979                         dev_warn(ctrl->device,
3980                                 "Identify NS List failed (status=0x%x)\n", ret);
3981                         goto free;
3982                 }
3983
3984                 for (i = 0; i < nr_entries; i++) {
3985                         u32 nsid = le32_to_cpu(ns_list[i]);
3986
3987                         if (!nsid)      /* end of the list? */
3988                                 goto out;
3989                         nvme_scan_ns(ctrl, nsid);
3990                         while (++prev < nsid)
3991                                 nvme_ns_remove_by_nsid(ctrl, prev);
3992                 }
3993         }
3994  out:
3995         nvme_remove_invalid_namespaces(ctrl, prev);
3996  free:
3997         kfree(ns_list);
3998         return ret;
3999 }
4000
4001 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4002 {
4003         struct nvme_id_ctrl *id;
4004         u32 nn, i;
4005
4006         if (nvme_identify_ctrl(ctrl, &id))
4007                 return;
4008         nn = le32_to_cpu(id->nn);
4009         kfree(id);
4010
4011         for (i = 1; i <= nn; i++)
4012                 nvme_scan_ns(ctrl, i);
4013
4014         nvme_remove_invalid_namespaces(ctrl, nn);
4015 }
4016
4017 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4018 {
4019         size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4020         __le32 *log;
4021         int error;
4022
4023         log = kzalloc(log_size, GFP_KERNEL);
4024         if (!log)
4025                 return;
4026
4027         /*
4028          * We need to read the log to clear the AEN, but we don't want to rely
4029          * on it for the changed namespace information as userspace could have
4030          * raced with us in reading the log page, which could cause us to miss
4031          * updates.
4032          */
4033         error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4034                         NVME_CSI_NVM, log, log_size, 0);
4035         if (error)
4036                 dev_warn(ctrl->device,
4037                         "reading changed ns log failed: %d\n", error);
4038
4039         kfree(log);
4040 }
4041
4042 static void nvme_scan_work(struct work_struct *work)
4043 {
4044         struct nvme_ctrl *ctrl =
4045                 container_of(work, struct nvme_ctrl, scan_work);
4046         int ret;
4047
4048         /* No tagset on a live ctrl means IO queues could not created */
4049         if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4050                 return;
4051
4052         /*
4053          * Identify controller limits can change at controller reset due to
4054          * new firmware download, even though it is not common we cannot ignore
4055          * such scenario. Controller's non-mdts limits are reported in the unit
4056          * of logical blocks that is dependent on the format of attached
4057          * namespace. Hence re-read the limits at the time of ns allocation.
4058          */
4059         ret = nvme_init_non_mdts_limits(ctrl);
4060         if (ret < 0) {
4061                 dev_warn(ctrl->device,
4062                         "reading non-mdts-limits failed: %d\n", ret);
4063                 return;
4064         }
4065
4066         if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4067                 dev_info(ctrl->device, "rescanning namespaces.\n");
4068                 nvme_clear_changed_ns_log(ctrl);
4069         }
4070
4071         mutex_lock(&ctrl->scan_lock);
4072         if (nvme_ctrl_limited_cns(ctrl)) {
4073                 nvme_scan_ns_sequential(ctrl);
4074         } else {
4075                 /*
4076                  * Fall back to sequential scan if DNR is set to handle broken
4077                  * devices which should support Identify NS List (as per the VS
4078                  * they report) but don't actually support it.
4079                  */
4080                 ret = nvme_scan_ns_list(ctrl);
4081                 if (ret > 0 && ret & NVME_SC_DNR)
4082                         nvme_scan_ns_sequential(ctrl);
4083         }
4084         mutex_unlock(&ctrl->scan_lock);
4085 }
4086
4087 /*
4088  * This function iterates the namespace list unlocked to allow recovery from
4089  * controller failure. It is up to the caller to ensure the namespace list is
4090  * not modified by scan work while this function is executing.
4091  */
4092 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4093 {
4094         struct nvme_ns *ns, *next;
4095         LIST_HEAD(ns_list);
4096
4097         /*
4098          * make sure to requeue I/O to all namespaces as these
4099          * might result from the scan itself and must complete
4100          * for the scan_work to make progress
4101          */
4102         nvme_mpath_clear_ctrl_paths(ctrl);
4103
4104         /*
4105          * Unquiesce io queues so any pending IO won't hang, especially
4106          * those submitted from scan work
4107          */
4108         nvme_unquiesce_io_queues(ctrl);
4109
4110         /* prevent racing with ns scanning */
4111         flush_work(&ctrl->scan_work);
4112
4113         /*
4114          * The dead states indicates the controller was not gracefully
4115          * disconnected. In that case, we won't be able to flush any data while
4116          * removing the namespaces' disks; fail all the queues now to avoid
4117          * potentially having to clean up the failed sync later.
4118          */
4119         if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4120                 nvme_mark_namespaces_dead(ctrl);
4121
4122         /* this is a no-op when called from the controller reset handler */
4123         nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4124
4125         down_write(&ctrl->namespaces_rwsem);
4126         list_splice_init(&ctrl->namespaces, &ns_list);
4127         up_write(&ctrl->namespaces_rwsem);
4128
4129         list_for_each_entry_safe(ns, next, &ns_list, list)
4130                 nvme_ns_remove(ns);
4131 }
4132 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4133
4134 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4135 {
4136         const struct nvme_ctrl *ctrl =
4137                 container_of(dev, struct nvme_ctrl, ctrl_device);
4138         struct nvmf_ctrl_options *opts = ctrl->opts;
4139         int ret;
4140
4141         ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4142         if (ret)
4143                 return ret;
4144
4145         if (opts) {
4146                 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4147                 if (ret)
4148                         return ret;
4149
4150                 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4151                                 opts->trsvcid ?: "none");
4152                 if (ret)
4153                         return ret;
4154
4155                 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4156                                 opts->host_traddr ?: "none");
4157                 if (ret)
4158                         return ret;
4159
4160                 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4161                                 opts->host_iface ?: "none");
4162         }
4163         return ret;
4164 }
4165
4166 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4167 {
4168         char *envp[2] = { envdata, NULL };
4169
4170         kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4171 }
4172
4173 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4174 {
4175         char *envp[2] = { NULL, NULL };
4176         u32 aen_result = ctrl->aen_result;
4177
4178         ctrl->aen_result = 0;
4179         if (!aen_result)
4180                 return;
4181
4182         envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4183         if (!envp[0])
4184                 return;
4185         kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4186         kfree(envp[0]);
4187 }
4188
4189 static void nvme_async_event_work(struct work_struct *work)
4190 {
4191         struct nvme_ctrl *ctrl =
4192                 container_of(work, struct nvme_ctrl, async_event_work);
4193
4194         nvme_aen_uevent(ctrl);
4195
4196         /*
4197          * The transport drivers must guarantee AER submission here is safe by
4198          * flushing ctrl async_event_work after changing the controller state
4199          * from LIVE and before freeing the admin queue.
4200         */
4201         if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4202                 ctrl->ops->submit_async_event(ctrl);
4203 }
4204
4205 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4206 {
4207
4208         u32 csts;
4209
4210         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4211                 return false;
4212
4213         if (csts == ~0)
4214                 return false;
4215
4216         return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4217 }
4218
4219 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4220 {
4221         struct nvme_fw_slot_info_log *log;
4222
4223         log = kmalloc(sizeof(*log), GFP_KERNEL);
4224         if (!log)
4225                 return;
4226
4227         if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4228                          log, sizeof(*log), 0)) {
4229                 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4230                 goto out_free_log;
4231         }
4232
4233         if (log->afi & 0x70 || !(log->afi & 0x7)) {
4234                 dev_info(ctrl->device,
4235                          "Firmware is activated after next Controller Level Reset\n");
4236                 goto out_free_log;
4237         }
4238
4239         memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4240                 sizeof(ctrl->subsys->firmware_rev));
4241
4242 out_free_log:
4243         kfree(log);
4244 }
4245
4246 static void nvme_fw_act_work(struct work_struct *work)
4247 {
4248         struct nvme_ctrl *ctrl = container_of(work,
4249                                 struct nvme_ctrl, fw_act_work);
4250         unsigned long fw_act_timeout;
4251
4252         nvme_auth_stop(ctrl);
4253
4254         if (ctrl->mtfa)
4255                 fw_act_timeout = jiffies +
4256                                 msecs_to_jiffies(ctrl->mtfa * 100);
4257         else
4258                 fw_act_timeout = jiffies +
4259                                 msecs_to_jiffies(admin_timeout * 1000);
4260
4261         nvme_quiesce_io_queues(ctrl);
4262         while (nvme_ctrl_pp_status(ctrl)) {
4263                 if (time_after(jiffies, fw_act_timeout)) {
4264                         dev_warn(ctrl->device,
4265                                 "Fw activation timeout, reset controller\n");
4266                         nvme_try_sched_reset(ctrl);
4267                         return;
4268                 }
4269                 msleep(100);
4270         }
4271
4272         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4273                 return;
4274
4275         nvme_unquiesce_io_queues(ctrl);
4276         /* read FW slot information to clear the AER */
4277         nvme_get_fw_slot_info(ctrl);
4278
4279         queue_work(nvme_wq, &ctrl->async_event_work);
4280 }
4281
4282 static u32 nvme_aer_type(u32 result)
4283 {
4284         return result & 0x7;
4285 }
4286
4287 static u32 nvme_aer_subtype(u32 result)
4288 {
4289         return (result & 0xff00) >> 8;
4290 }
4291
4292 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4293 {
4294         u32 aer_notice_type = nvme_aer_subtype(result);
4295         bool requeue = true;
4296
4297         switch (aer_notice_type) {
4298         case NVME_AER_NOTICE_NS_CHANGED:
4299                 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4300                 nvme_queue_scan(ctrl);
4301                 break;
4302         case NVME_AER_NOTICE_FW_ACT_STARTING:
4303                 /*
4304                  * We are (ab)using the RESETTING state to prevent subsequent
4305                  * recovery actions from interfering with the controller's
4306                  * firmware activation.
4307                  */
4308                 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4309                         requeue = false;
4310                         queue_work(nvme_wq, &ctrl->fw_act_work);
4311                 }
4312                 break;
4313 #ifdef CONFIG_NVME_MULTIPATH
4314         case NVME_AER_NOTICE_ANA:
4315                 if (!ctrl->ana_log_buf)
4316                         break;
4317                 queue_work(nvme_wq, &ctrl->ana_work);
4318                 break;
4319 #endif
4320         case NVME_AER_NOTICE_DISC_CHANGED:
4321                 ctrl->aen_result = result;
4322                 break;
4323         default:
4324                 dev_warn(ctrl->device, "async event result %08x\n", result);
4325         }
4326         return requeue;
4327 }
4328
4329 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4330 {
4331         dev_warn(ctrl->device, "resetting controller due to AER\n");
4332         nvme_reset_ctrl(ctrl);
4333 }
4334
4335 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4336                 volatile union nvme_result *res)
4337 {
4338         u32 result = le32_to_cpu(res->u32);
4339         u32 aer_type = nvme_aer_type(result);
4340         u32 aer_subtype = nvme_aer_subtype(result);
4341         bool requeue = true;
4342
4343         if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4344                 return;
4345
4346         trace_nvme_async_event(ctrl, result);
4347         switch (aer_type) {
4348         case NVME_AER_NOTICE:
4349                 requeue = nvme_handle_aen_notice(ctrl, result);
4350                 break;
4351         case NVME_AER_ERROR:
4352                 /*
4353                  * For a persistent internal error, don't run async_event_work
4354                  * to submit a new AER. The controller reset will do it.
4355                  */
4356                 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4357                         nvme_handle_aer_persistent_error(ctrl);
4358                         return;
4359                 }
4360                 fallthrough;
4361         case NVME_AER_SMART:
4362         case NVME_AER_CSS:
4363         case NVME_AER_VS:
4364                 ctrl->aen_result = result;
4365                 break;
4366         default:
4367                 break;
4368         }
4369
4370         if (requeue)
4371                 queue_work(nvme_wq, &ctrl->async_event_work);
4372 }
4373 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4374
4375 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4376                 const struct blk_mq_ops *ops, unsigned int cmd_size)
4377 {
4378         struct queue_limits lim = {};
4379         int ret;
4380
4381         memset(set, 0, sizeof(*set));
4382         set->ops = ops;
4383         set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4384         if (ctrl->ops->flags & NVME_F_FABRICS)
4385                 /* Reserved for fabric connect and keep alive */
4386                 set->reserved_tags = 2;
4387         set->numa_node = ctrl->numa_node;
4388         set->flags = BLK_MQ_F_NO_SCHED;
4389         if (ctrl->ops->flags & NVME_F_BLOCKING)
4390                 set->flags |= BLK_MQ_F_BLOCKING;
4391         set->cmd_size = cmd_size;
4392         set->driver_data = ctrl;
4393         set->nr_hw_queues = 1;
4394         set->timeout = NVME_ADMIN_TIMEOUT;
4395         ret = blk_mq_alloc_tag_set(set);
4396         if (ret)
4397                 return ret;
4398
4399         ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4400         if (IS_ERR(ctrl->admin_q)) {
4401                 ret = PTR_ERR(ctrl->admin_q);
4402                 goto out_free_tagset;
4403         }
4404
4405         if (ctrl->ops->flags & NVME_F_FABRICS) {
4406                 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4407                 if (IS_ERR(ctrl->fabrics_q)) {
4408                         ret = PTR_ERR(ctrl->fabrics_q);
4409                         goto out_cleanup_admin_q;
4410                 }
4411         }
4412
4413         ctrl->admin_tagset = set;
4414         return 0;
4415
4416 out_cleanup_admin_q:
4417         blk_mq_destroy_queue(ctrl->admin_q);
4418         blk_put_queue(ctrl->admin_q);
4419 out_free_tagset:
4420         blk_mq_free_tag_set(set);
4421         ctrl->admin_q = NULL;
4422         ctrl->fabrics_q = NULL;
4423         return ret;
4424 }
4425 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4426
4427 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4428 {
4429         blk_mq_destroy_queue(ctrl->admin_q);
4430         blk_put_queue(ctrl->admin_q);
4431         if (ctrl->ops->flags & NVME_F_FABRICS) {
4432                 blk_mq_destroy_queue(ctrl->fabrics_q);
4433                 blk_put_queue(ctrl->fabrics_q);
4434         }
4435         blk_mq_free_tag_set(ctrl->admin_tagset);
4436 }
4437 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4438
4439 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4440                 const struct blk_mq_ops *ops, unsigned int nr_maps,
4441                 unsigned int cmd_size)
4442 {
4443         int ret;
4444
4445         memset(set, 0, sizeof(*set));
4446         set->ops = ops;
4447         set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4448         /*
4449          * Some Apple controllers requires tags to be unique across admin and
4450          * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4451          */
4452         if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4453                 set->reserved_tags = NVME_AQ_DEPTH;
4454         else if (ctrl->ops->flags & NVME_F_FABRICS)
4455                 /* Reserved for fabric connect */
4456                 set->reserved_tags = 1;
4457         set->numa_node = ctrl->numa_node;
4458         set->flags = BLK_MQ_F_SHOULD_MERGE;
4459         if (ctrl->ops->flags & NVME_F_BLOCKING)
4460                 set->flags |= BLK_MQ_F_BLOCKING;
4461         set->cmd_size = cmd_size,
4462         set->driver_data = ctrl;
4463         set->nr_hw_queues = ctrl->queue_count - 1;
4464         set->timeout = NVME_IO_TIMEOUT;
4465         set->nr_maps = nr_maps;
4466         ret = blk_mq_alloc_tag_set(set);
4467         if (ret)
4468                 return ret;
4469
4470         if (ctrl->ops->flags & NVME_F_FABRICS) {
4471                 ctrl->connect_q = blk_mq_alloc_queue(set, NULL, NULL);
4472                 if (IS_ERR(ctrl->connect_q)) {
4473                         ret = PTR_ERR(ctrl->connect_q);
4474                         goto out_free_tag_set;
4475                 }
4476                 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4477                                    ctrl->connect_q);
4478         }
4479
4480         ctrl->tagset = set;
4481         return 0;
4482
4483 out_free_tag_set:
4484         blk_mq_free_tag_set(set);
4485         ctrl->connect_q = NULL;
4486         return ret;
4487 }
4488 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4489
4490 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4491 {
4492         if (ctrl->ops->flags & NVME_F_FABRICS) {
4493                 blk_mq_destroy_queue(ctrl->connect_q);
4494                 blk_put_queue(ctrl->connect_q);
4495         }
4496         blk_mq_free_tag_set(ctrl->tagset);
4497 }
4498 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4499
4500 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4501 {
4502         nvme_mpath_stop(ctrl);
4503         nvme_auth_stop(ctrl);
4504         nvme_stop_keep_alive(ctrl);
4505         nvme_stop_failfast_work(ctrl);
4506         flush_work(&ctrl->async_event_work);
4507         cancel_work_sync(&ctrl->fw_act_work);
4508         if (ctrl->ops->stop_ctrl)
4509                 ctrl->ops->stop_ctrl(ctrl);
4510 }
4511 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4512
4513 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4514 {
4515         nvme_enable_aen(ctrl);
4516
4517         /*
4518          * persistent discovery controllers need to send indication to userspace
4519          * to re-read the discovery log page to learn about possible changes
4520          * that were missed. We identify persistent discovery controllers by
4521          * checking that they started once before, hence are reconnecting back.
4522          */
4523         if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4524             nvme_discovery_ctrl(ctrl))
4525                 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4526
4527         if (ctrl->queue_count > 1) {
4528                 nvme_queue_scan(ctrl);
4529                 nvme_unquiesce_io_queues(ctrl);
4530                 nvme_mpath_update(ctrl);
4531         }
4532
4533         nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4534         set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4535 }
4536 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4537
4538 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4539 {
4540         nvme_hwmon_exit(ctrl);
4541         nvme_fault_inject_fini(&ctrl->fault_inject);
4542         dev_pm_qos_hide_latency_tolerance(ctrl->device);
4543         cdev_device_del(&ctrl->cdev, ctrl->device);
4544         nvme_put_ctrl(ctrl);
4545 }
4546 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4547
4548 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4549 {
4550         struct nvme_effects_log *cel;
4551         unsigned long i;
4552
4553         xa_for_each(&ctrl->cels, i, cel) {
4554                 xa_erase(&ctrl->cels, i);
4555                 kfree(cel);
4556         }
4557
4558         xa_destroy(&ctrl->cels);
4559 }
4560
4561 static void nvme_free_ctrl(struct device *dev)
4562 {
4563         struct nvme_ctrl *ctrl =
4564                 container_of(dev, struct nvme_ctrl, ctrl_device);
4565         struct nvme_subsystem *subsys = ctrl->subsys;
4566
4567         if (!subsys || ctrl->instance != subsys->instance)
4568                 ida_free(&nvme_instance_ida, ctrl->instance);
4569         key_put(ctrl->tls_key);
4570         nvme_free_cels(ctrl);
4571         nvme_mpath_uninit(ctrl);
4572         nvme_auth_stop(ctrl);
4573         nvme_auth_free(ctrl);
4574         __free_page(ctrl->discard_page);
4575         free_opal_dev(ctrl->opal_dev);
4576
4577         if (subsys) {
4578                 mutex_lock(&nvme_subsystems_lock);
4579                 list_del(&ctrl->subsys_entry);
4580                 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4581                 mutex_unlock(&nvme_subsystems_lock);
4582         }
4583
4584         ctrl->ops->free_ctrl(ctrl);
4585
4586         if (subsys)
4587                 nvme_put_subsystem(subsys);
4588 }
4589
4590 /*
4591  * Initialize a NVMe controller structures.  This needs to be called during
4592  * earliest initialization so that we have the initialized structured around
4593  * during probing.
4594  */
4595 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4596                 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4597 {
4598         int ret;
4599
4600         WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4601         ctrl->passthru_err_log_enabled = false;
4602         clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4603         spin_lock_init(&ctrl->lock);
4604         mutex_init(&ctrl->scan_lock);
4605         INIT_LIST_HEAD(&ctrl->namespaces);
4606         xa_init(&ctrl->cels);
4607         init_rwsem(&ctrl->namespaces_rwsem);
4608         ctrl->dev = dev;
4609         ctrl->ops = ops;
4610         ctrl->quirks = quirks;
4611         ctrl->numa_node = NUMA_NO_NODE;
4612         INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4613         INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4614         INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4615         INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4616         init_waitqueue_head(&ctrl->state_wq);
4617
4618         INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4619         INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4620         memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4621         ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4622         ctrl->ka_last_check_time = jiffies;
4623
4624         BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4625                         PAGE_SIZE);
4626         ctrl->discard_page = alloc_page(GFP_KERNEL);
4627         if (!ctrl->discard_page) {
4628                 ret = -ENOMEM;
4629                 goto out;
4630         }
4631
4632         ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4633         if (ret < 0)
4634                 goto out;
4635         ctrl->instance = ret;
4636
4637         device_initialize(&ctrl->ctrl_device);
4638         ctrl->device = &ctrl->ctrl_device;
4639         ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4640                         ctrl->instance);
4641         ctrl->device->class = &nvme_class;
4642         ctrl->device->parent = ctrl->dev;
4643         if (ops->dev_attr_groups)
4644                 ctrl->device->groups = ops->dev_attr_groups;
4645         else
4646                 ctrl->device->groups = nvme_dev_attr_groups;
4647         ctrl->device->release = nvme_free_ctrl;
4648         dev_set_drvdata(ctrl->device, ctrl);
4649         ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4650         if (ret)
4651                 goto out_release_instance;
4652
4653         nvme_get_ctrl(ctrl);
4654         cdev_init(&ctrl->cdev, &nvme_dev_fops);
4655         ctrl->cdev.owner = ops->module;
4656         ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4657         if (ret)
4658                 goto out_free_name;
4659
4660         /*
4661          * Initialize latency tolerance controls.  The sysfs files won't
4662          * be visible to userspace unless the device actually supports APST.
4663          */
4664         ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4665         dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4666                 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4667
4668         nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4669         nvme_mpath_init_ctrl(ctrl);
4670         ret = nvme_auth_init_ctrl(ctrl);
4671         if (ret)
4672                 goto out_free_cdev;
4673
4674         return 0;
4675 out_free_cdev:
4676         nvme_fault_inject_fini(&ctrl->fault_inject);
4677         dev_pm_qos_hide_latency_tolerance(ctrl->device);
4678         cdev_device_del(&ctrl->cdev, ctrl->device);
4679 out_free_name:
4680         nvme_put_ctrl(ctrl);
4681         kfree_const(ctrl->device->kobj.name);
4682 out_release_instance:
4683         ida_free(&nvme_instance_ida, ctrl->instance);
4684 out:
4685         if (ctrl->discard_page)
4686                 __free_page(ctrl->discard_page);
4687         return ret;
4688 }
4689 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4690
4691 /* let I/O to all namespaces fail in preparation for surprise removal */
4692 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4693 {
4694         struct nvme_ns *ns;
4695
4696         down_read(&ctrl->namespaces_rwsem);
4697         list_for_each_entry(ns, &ctrl->namespaces, list)
4698                 blk_mark_disk_dead(ns->disk);
4699         up_read(&ctrl->namespaces_rwsem);
4700 }
4701 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4702
4703 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4704 {
4705         struct nvme_ns *ns;
4706
4707         down_read(&ctrl->namespaces_rwsem);
4708         list_for_each_entry(ns, &ctrl->namespaces, list)
4709                 blk_mq_unfreeze_queue(ns->queue);
4710         up_read(&ctrl->namespaces_rwsem);
4711         clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4712 }
4713 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4714
4715 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4716 {
4717         struct nvme_ns *ns;
4718
4719         down_read(&ctrl->namespaces_rwsem);
4720         list_for_each_entry(ns, &ctrl->namespaces, list) {
4721                 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4722                 if (timeout <= 0)
4723                         break;
4724         }
4725         up_read(&ctrl->namespaces_rwsem);
4726         return timeout;
4727 }
4728 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4729
4730 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4731 {
4732         struct nvme_ns *ns;
4733
4734         down_read(&ctrl->namespaces_rwsem);
4735         list_for_each_entry(ns, &ctrl->namespaces, list)
4736                 blk_mq_freeze_queue_wait(ns->queue);
4737         up_read(&ctrl->namespaces_rwsem);
4738 }
4739 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4740
4741 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4742 {
4743         struct nvme_ns *ns;
4744
4745         set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4746         down_read(&ctrl->namespaces_rwsem);
4747         list_for_each_entry(ns, &ctrl->namespaces, list)
4748                 blk_freeze_queue_start(ns->queue);
4749         up_read(&ctrl->namespaces_rwsem);
4750 }
4751 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4752
4753 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4754 {
4755         if (!ctrl->tagset)
4756                 return;
4757         if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4758                 blk_mq_quiesce_tagset(ctrl->tagset);
4759         else
4760                 blk_mq_wait_quiesce_done(ctrl->tagset);
4761 }
4762 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4763
4764 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4765 {
4766         if (!ctrl->tagset)
4767                 return;
4768         if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4769                 blk_mq_unquiesce_tagset(ctrl->tagset);
4770 }
4771 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4772
4773 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4774 {
4775         if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4776                 blk_mq_quiesce_queue(ctrl->admin_q);
4777         else
4778                 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4779 }
4780 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4781
4782 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4783 {
4784         if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4785                 blk_mq_unquiesce_queue(ctrl->admin_q);
4786 }
4787 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4788
4789 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4790 {
4791         struct nvme_ns *ns;
4792
4793         down_read(&ctrl->namespaces_rwsem);
4794         list_for_each_entry(ns, &ctrl->namespaces, list)
4795                 blk_sync_queue(ns->queue);
4796         up_read(&ctrl->namespaces_rwsem);
4797 }
4798 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4799
4800 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4801 {
4802         nvme_sync_io_queues(ctrl);
4803         if (ctrl->admin_q)
4804                 blk_sync_queue(ctrl->admin_q);
4805 }
4806 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4807
4808 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4809 {
4810         if (file->f_op != &nvme_dev_fops)
4811                 return NULL;
4812         return file->private_data;
4813 }
4814 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4815
4816 /*
4817  * Check we didn't inadvertently grow the command structure sizes:
4818  */
4819 static inline void _nvme_check_size(void)
4820 {
4821         BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4822         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4823         BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4824         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4825         BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4826         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4827         BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4828         BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4829         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4830         BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4831         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4832         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4833         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4834         BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4835                         NVME_IDENTIFY_DATA_SIZE);
4836         BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4837         BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4838         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4839         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4840         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4841         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4842         BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4843         BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4844         BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4845 }
4846
4847
4848 static int __init nvme_core_init(void)
4849 {
4850         int result = -ENOMEM;
4851
4852         _nvme_check_size();
4853
4854         nvme_wq = alloc_workqueue("nvme-wq",
4855                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4856         if (!nvme_wq)
4857                 goto out;
4858
4859         nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4860                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4861         if (!nvme_reset_wq)
4862                 goto destroy_wq;
4863
4864         nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4865                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4866         if (!nvme_delete_wq)
4867                 goto destroy_reset_wq;
4868
4869         result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4870                         NVME_MINORS, "nvme");
4871         if (result < 0)
4872                 goto destroy_delete_wq;
4873
4874         result = class_register(&nvme_class);
4875         if (result)
4876                 goto unregister_chrdev;
4877
4878         result = class_register(&nvme_subsys_class);
4879         if (result)
4880                 goto destroy_class;
4881
4882         result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4883                                      "nvme-generic");
4884         if (result < 0)
4885                 goto destroy_subsys_class;
4886
4887         result = class_register(&nvme_ns_chr_class);
4888         if (result)
4889                 goto unregister_generic_ns;
4890
4891         result = nvme_init_auth();
4892         if (result)
4893                 goto destroy_ns_chr;
4894         return 0;
4895
4896 destroy_ns_chr:
4897         class_unregister(&nvme_ns_chr_class);
4898 unregister_generic_ns:
4899         unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4900 destroy_subsys_class:
4901         class_unregister(&nvme_subsys_class);
4902 destroy_class:
4903         class_unregister(&nvme_class);
4904 unregister_chrdev:
4905         unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4906 destroy_delete_wq:
4907         destroy_workqueue(nvme_delete_wq);
4908 destroy_reset_wq:
4909         destroy_workqueue(nvme_reset_wq);
4910 destroy_wq:
4911         destroy_workqueue(nvme_wq);
4912 out:
4913         return result;
4914 }
4915
4916 static void __exit nvme_core_exit(void)
4917 {
4918         nvme_exit_auth();
4919         class_unregister(&nvme_ns_chr_class);
4920         class_unregister(&nvme_subsys_class);
4921         class_unregister(&nvme_class);
4922         unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4923         unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4924         destroy_workqueue(nvme_delete_wq);
4925         destroy_workqueue(nvme_reset_wq);
4926         destroy_workqueue(nvme_wq);
4927         ida_destroy(&nvme_ns_chr_minor_ida);
4928         ida_destroy(&nvme_instance_ida);
4929 }
4930
4931 MODULE_LICENSE("GPL");
4932 MODULE_VERSION("1.0");
4933 MODULE_DESCRIPTION("NVMe host core framework");
4934 module_init(nvme_core_init);
4935 module_exit(nvme_core_exit);