1 // SPDX-License-Identifier: GPL-2.0
2 // ff-protocol-former.c - a part of driver for RME Fireface series
4 // Copyright (c) 2019 Takashi Sakamoto
6 #include <linux/delay.h>
10 #define FORMER_REG_SYNC_STATUS 0x0000801c0000ull
11 /* For block write request. */
12 #define FORMER_REG_FETCH_PCM_FRAMES 0x0000801c0000ull
13 #define FORMER_REG_CLOCK_CONFIG 0x0000801c0004ull
15 static int parse_clock_bits(u32 data, unsigned int *rate,
16 enum snd_ff_clock_src *src)
21 } *rate_entry, rate_entries[] = {
22 { 32000, 0x00000002, },
23 { 44100, 0x00000000, },
24 { 48000, 0x00000006, },
25 { 64000, 0x0000000a, },
26 { 88200, 0x00000008, },
27 { 96000, 0x0000000e, },
28 { 128000, 0x00000012, },
29 { 176400, 0x00000010, },
30 { 192000, 0x00000016, },
33 enum snd_ff_clock_src src;
35 } *clk_entry, clk_entries[] = {
36 { SND_FF_CLOCK_SRC_ADAT1, 0x00000000, },
37 { SND_FF_CLOCK_SRC_ADAT2, 0x00000400, },
38 { SND_FF_CLOCK_SRC_SPDIF, 0x00000c00, },
39 { SND_FF_CLOCK_SRC_WORD, 0x00001000, },
40 { SND_FF_CLOCK_SRC_LTC, 0x00001800, },
44 for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) {
45 rate_entry = rate_entries + i;
46 if ((data & 0x0000001e) == rate_entry->mask) {
47 *rate = rate_entry->rate;
51 if (i == ARRAY_SIZE(rate_entries))
54 if (data & 0x00000001) {
55 *src = SND_FF_CLOCK_SRC_INTERNAL;
57 for (i = 0; i < ARRAY_SIZE(clk_entries); ++i) {
58 clk_entry = clk_entries + i;
59 if ((data & 0x00001c00) == clk_entry->mask) {
60 *src = clk_entry->src;
64 if (i == ARRAY_SIZE(clk_entries))
71 static int former_get_clock(struct snd_ff *ff, unsigned int *rate,
72 enum snd_ff_clock_src *src)
78 err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
79 FORMER_REG_CLOCK_CONFIG, ®, sizeof(reg), 0);
82 data = le32_to_cpu(reg);
84 return parse_clock_bits(data, rate, src);
87 static int former_switch_fetching_mode(struct snd_ff *ff, bool enable)
95 for (i = 0; i < SND_FF_STREAM_MODE_COUNT; ++i)
96 count = max(count, ff->spec->pcm_playback_channels[i]);
98 reg = kcalloc(count, sizeof(__le32), GFP_KERNEL);
104 * Each quadlet is corresponding to data channels in a data
105 * blocks in reverse order. Precisely, quadlets for available
106 * data channels should be enabled. Here, I take second best
107 * to fetch PCM frames from all of data channels regardless of
110 for (i = 0; i < count; ++i)
111 reg[i] = cpu_to_le32(0x00000001);
114 err = snd_fw_transaction(ff->unit, TCODE_WRITE_BLOCK_REQUEST,
115 FORMER_REG_FETCH_PCM_FRAMES, reg,
116 sizeof(__le32) * count, 0);
121 static void dump_clock_config(struct snd_ff *ff, struct snd_info_buffer *buffer)
126 enum snd_ff_clock_src src;
130 err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST,
131 FORMER_REG_CLOCK_CONFIG, ®, sizeof(reg), 0);
134 data = le32_to_cpu(reg);
136 snd_iprintf(buffer, "Output S/PDIF format: %s (Emphasis: %s)\n",
137 (data & 0x00000020) ? "Professional" : "Consumer",
138 (data & 0x00000040) ? "on" : "off");
140 snd_iprintf(buffer, "Optical output interface format: %s\n",
141 (data & 0x00000100) ? "S/PDIF" : "ADAT");
143 snd_iprintf(buffer, "Word output single speed: %s\n",
144 (data & 0x00002000) ? "on" : "off");
146 snd_iprintf(buffer, "S/PDIF input interface: %s\n",
147 (data & 0x00000200) ? "Optical" : "Coaxial");
149 err = parse_clock_bits(data, &rate, &src);
152 label = snd_ff_proc_get_clk_label(src);
156 snd_iprintf(buffer, "Clock configuration: %d %s\n", rate, label);
159 static void dump_sync_status(struct snd_ff *ff, struct snd_info_buffer *buffer)
161 static const struct {
165 } *clk_entry, clk_entries[] = {
166 { "WDClk", 0x40000000, 0x20000000, },
167 { "S/PDIF", 0x00080000, 0x00040000, },
168 { "ADAT1", 0x00000400, 0x00001000, },
169 { "ADAT2", 0x00000800, 0x00002000, },
171 static const struct {
174 } *referred_entry, referred_entries[] = {
175 { "ADAT1", 0x00000000, },
176 { "ADAT2", 0x00400000, },
177 { "S/PDIF", 0x00c00000, },
178 { "WDclk", 0x01000000, },
179 { "TCO", 0x01400000, },
181 static const struct {
184 } *rate_entry, rate_entries[] = {
185 { 32000, 0x02000000, },
186 { 44100, 0x04000000, },
187 { 48000, 0x06000000, },
188 { 64000, 0x08000000, },
189 { 88200, 0x0a000000, },
190 { 96000, 0x0c000000, },
191 { 128000, 0x0e000000, },
192 { 176400, 0x10000000, },
193 { 192000, 0x12000000, },
200 err = snd_fw_transaction(ff->unit, TCODE_READ_BLOCK_REQUEST,
201 FORMER_REG_SYNC_STATUS, reg, sizeof(reg), 0);
204 data[0] = le32_to_cpu(reg[0]);
205 data[1] = le32_to_cpu(reg[1]);
207 snd_iprintf(buffer, "External source detection:\n");
209 for (i = 0; i < ARRAY_SIZE(clk_entries); ++i) {
212 clk_entry = clk_entries + i;
213 if (data[0] & clk_entry->locked_mask) {
214 if (data[0] & clk_entry->synced_mask)
222 snd_iprintf(buffer, "%s: %s\n", clk_entry->label, state);
225 snd_iprintf(buffer, "Referred clock:\n");
227 if (data[1] & 0x00000001) {
228 snd_iprintf(buffer, "Internal\n");
233 for (i = 0; i < ARRAY_SIZE(referred_entries); ++i) {
234 referred_entry = referred_entries + i;
235 if ((data[0] & 0x1e0000) == referred_entry->mask) {
236 label = referred_entry->label;
240 if (i == ARRAY_SIZE(referred_entries))
243 for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) {
244 rate_entry = rate_entries + i;
245 if ((data[0] & 0x1e000000) == rate_entry->mask) {
246 rate = rate_entry->rate;
250 if (i == ARRAY_SIZE(rate_entries))
253 snd_iprintf(buffer, "%s %d\n", label, rate);
257 static void former_dump_status(struct snd_ff *ff,
258 struct snd_info_buffer *buffer)
260 dump_clock_config(ff, buffer);
261 dump_sync_status(ff, buffer);
264 static int former_fill_midi_msg(struct snd_ff *ff,
265 struct snd_rawmidi_substream *substream,
268 u8 *buf = (u8 *)ff->msg_buf[port];
272 len = snd_rawmidi_transmit_peek(substream, buf,
273 SND_FF_MAXIMIM_MIDI_QUADS);
277 // One quadlet includes one byte.
278 for (i = len - 1; i >= 0; --i)
279 ff->msg_buf[port][i] = cpu_to_le32(buf[i]);
280 ff->rx_bytes[port] = len;
285 #define FF800_STF 0x0000fc88f000
286 #define FF800_RX_PACKET_FORMAT 0x0000fc88f004
287 #define FF800_ALLOC_TX_STREAM 0x0000fc88f008
288 #define FF800_ISOC_COMM_START 0x0000fc88f00c
289 #define FF800_TX_S800_FLAG 0x00000800
290 #define FF800_ISOC_COMM_STOP 0x0000fc88f010
292 #define FF800_TX_PACKET_ISOC_CH 0x0000801c0008
294 static int allocate_tx_resources(struct snd_ff *ff)
298 unsigned int tx_isoc_channel;
301 reg = cpu_to_le32(ff->tx_stream.data_block_quadlets);
302 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
303 FF800_ALLOC_TX_STREAM, ®, sizeof(reg), 0);
307 // Wait till the format of tx packet is available.
309 while (count++ < 10) {
311 err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
312 FF800_TX_PACKET_ISOC_CH, ®, sizeof(reg), 0);
316 data = le32_to_cpu(reg);
317 if (data != 0xffffffff) {
318 tx_isoc_channel = data;
327 // NOTE: this is a makeshift to start OHCI 1394 IR context in the
328 // channel. On the other hand, 'struct fw_iso_resources.allocated' is
329 // not true and it's not deallocated at stop.
330 ff->tx_resources.channel = tx_isoc_channel;
335 static int ff800_allocate_resources(struct snd_ff *ff, unsigned int rate)
341 reg = cpu_to_le32(rate);
342 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
343 FF800_STF, ®, sizeof(reg), 0);
347 // If starting isochronous communication immediately, change of STF has
348 // no effect. In this case, the communication runs based on former STF.
349 // Let's sleep for a bit.
352 // Controllers should allocate isochronous resources for rx stream.
353 err = fw_iso_resources_allocate(&ff->rx_resources,
354 amdtp_stream_get_max_payload(&ff->rx_stream),
355 fw_parent_device(ff->unit)->max_speed);
359 // Set isochronous channel and the number of quadlets of rx packets.
360 // This should be done before the allocation of tx resources to avoid
362 data = ff->rx_stream.data_block_quadlets << 3;
363 data = (data << 8) | ff->rx_resources.channel;
364 reg = cpu_to_le32(data);
365 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
366 FF800_RX_PACKET_FORMAT, ®, sizeof(reg), 0);
370 return allocate_tx_resources(ff);
373 static int ff800_begin_session(struct snd_ff *ff, unsigned int rate)
375 unsigned int generation = ff->rx_resources.generation;
378 if (generation != fw_parent_device(ff->unit)->card->generation) {
379 int err = fw_iso_resources_update(&ff->rx_resources);
384 reg = cpu_to_le32(0x80000000);
385 reg |= cpu_to_le32(ff->tx_stream.data_block_quadlets);
386 if (fw_parent_device(ff->unit)->max_speed == SCODE_800)
387 reg |= cpu_to_le32(FF800_TX_S800_FLAG);
388 return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
389 FF800_ISOC_COMM_START, ®, sizeof(reg), 0);
392 static void ff800_finish_session(struct snd_ff *ff)
396 reg = cpu_to_le32(0x80000000);
397 snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
398 FF800_ISOC_COMM_STOP, ®, sizeof(reg), 0);
401 // Fireface 800 doesn't allow drivers to register lower 4 bytes of destination
403 // A write transaction to clear registered higher 4 bytes of destination address
404 // has an effect to suppress asynchronous transaction from device.
405 static void ff800_handle_midi_msg(struct snd_ff *ff, unsigned int offset, const __le32 *buf,
406 size_t length, u32 tstamp)
410 for (i = 0; i < length / 4; i++) {
411 u8 byte = le32_to_cpu(buf[i]) & 0xff;
412 struct snd_rawmidi_substream *substream;
414 substream = READ_ONCE(ff->tx_midi_substreams[0]);
416 snd_rawmidi_receive(substream, &byte, 1);
420 const struct snd_ff_protocol snd_ff_protocol_ff800 = {
421 .handle_msg = ff800_handle_midi_msg,
422 .fill_midi_msg = former_fill_midi_msg,
423 .get_clock = former_get_clock,
424 .switch_fetching_mode = former_switch_fetching_mode,
425 .allocate_resources = ff800_allocate_resources,
426 .begin_session = ff800_begin_session,
427 .finish_session = ff800_finish_session,
428 .dump_status = former_dump_status,
431 #define FF400_STF 0x000080100500ull
432 #define FF400_RX_PACKET_FORMAT 0x000080100504ull
433 #define FF400_ISOC_COMM_START 0x000080100508ull
434 #define FF400_TX_PACKET_FORMAT 0x00008010050cull
435 #define FF400_ISOC_COMM_STOP 0x000080100510ull
437 // Fireface 400 manages isochronous channel number in 3 bit field. Therefore,
438 // we can allocate between 0 and 7 channel.
439 static int ff400_allocate_resources(struct snd_ff *ff, unsigned int rate)
442 enum snd_ff_stream_mode mode;
446 // Check whether the given value is supported or not.
447 for (i = 0; i < CIP_SFC_COUNT; i++) {
448 if (amdtp_rate_table[i] == rate)
451 if (i >= CIP_SFC_COUNT)
454 // Set the number of data blocks transferred in a second.
455 reg = cpu_to_le32(rate);
456 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
457 FF400_STF, ®, sizeof(reg), 0);
463 err = snd_ff_stream_get_multiplier_mode(i, &mode);
467 // Keep resources for in-stream.
468 ff->tx_resources.channels_mask = 0x00000000000000ffuLL;
469 err = fw_iso_resources_allocate(&ff->tx_resources,
470 amdtp_stream_get_max_payload(&ff->tx_stream),
471 fw_parent_device(ff->unit)->max_speed);
475 // Keep resources for out-stream.
476 ff->rx_resources.channels_mask = 0x00000000000000ffuLL;
477 err = fw_iso_resources_allocate(&ff->rx_resources,
478 amdtp_stream_get_max_payload(&ff->rx_stream),
479 fw_parent_device(ff->unit)->max_speed);
481 fw_iso_resources_free(&ff->tx_resources);
486 static int ff400_begin_session(struct snd_ff *ff, unsigned int rate)
488 unsigned int generation = ff->rx_resources.generation;
492 if (generation != fw_parent_device(ff->unit)->card->generation) {
493 err = fw_iso_resources_update(&ff->tx_resources);
497 err = fw_iso_resources_update(&ff->rx_resources);
502 // Set isochronous channel and the number of quadlets of received
504 reg = cpu_to_le32(((ff->rx_stream.data_block_quadlets << 3) << 8) |
505 ff->rx_resources.channel);
506 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
507 FF400_RX_PACKET_FORMAT, ®, sizeof(reg), 0);
511 // Set isochronous channel and the number of quadlets of transmitted
513 // TODO: investigate the purpose of this 0x80.
514 reg = cpu_to_le32((0x80 << 24) |
515 (ff->tx_resources.channel << 5) |
516 (ff->tx_stream.data_block_quadlets));
517 err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
518 FF400_TX_PACKET_FORMAT, ®, sizeof(reg), 0);
522 // Allow to transmit packets.
523 reg = cpu_to_le32(0x00000001);
524 return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
525 FF400_ISOC_COMM_START, ®, sizeof(reg), 0);
528 static void ff400_finish_session(struct snd_ff *ff)
532 reg = cpu_to_le32(0x80000000);
533 snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
534 FF400_ISOC_COMM_STOP, ®, sizeof(reg), 0);
537 static void parse_midi_msg(struct snd_ff *ff, u32 quad, unsigned int port)
539 struct snd_rawmidi_substream *substream = READ_ONCE(ff->tx_midi_substreams[port]);
541 if (substream != NULL) {
542 u8 byte = (quad >> (16 * port)) & 0x000000ff;
544 snd_rawmidi_receive(substream, &byte, 1);
548 #define FF400_QUEUE_SIZE 32
550 struct ff400_msg_parser {
554 } msgs[FF400_QUEUE_SIZE];
559 static bool ff400_has_msg(struct snd_ff *ff)
561 struct ff400_msg_parser *parser = ff->msg_parser;
563 return (parser->push_pos != parser->pull_pos);
566 // For Fireface 400, lower 4 bytes of destination address is configured by bit
567 // flag in quadlet register (little endian) at 0x'0000'801'0051c. Drivers can
568 // select one of 4 options:
570 // bit flags: offset of destination address
571 // - 0x04000000: 0x'....'....'0000'0000
572 // - 0x08000000: 0x'....'....'0000'0080
573 // - 0x10000000: 0x'....'....'0000'0100
574 // - 0x20000000: 0x'....'....'0000'0180
576 // Drivers can suppress the device to transfer asynchronous transactions by
577 // using below 2 bits.
578 // - 0x01000000: suppress transmission
579 // - 0x02000000: suppress transmission
581 // Actually, the register is write-only and includes the other options such as
582 // input attenuation. This driver allocates destination address with '0000'0000
583 // in its lower offset and expects userspace application to configure the
586 // When the message is for signal level operation, the upper 4 bits in MSB expresses the pair of
587 // stereo physical port.
588 // - 0: Microphone input 0/1
589 // - 1: Line input 0/1
590 // - [2-4]: Line output 0-5
591 // - 5: Headphone output 0/1
592 // - 6: S/PDIF output 0/1
593 // - [7-10]: ADAT output 0-7
595 // The value of signal level can be detected by mask of 0x00fffc00. For signal level of microphone
607 // For signal level of line input:
618 // For signal level of any type of output:
635 // When the message is not for signal level operation, it's for MIDI bytes. When matching to
636 // FF400_MSG_FLAG_IS_MIDI_PORT_0, one MIDI byte can be detected by mask of 0x000000ff. When
637 // matching to FF400_MSG_FLAG_IS_MIDI_PORT_1, one MIDI byte can be detected by mask of 0x00ff0000.
638 #define FF400_MSG_FLAG_IS_SIGNAL_LEVEL 0x04000000
639 #define FF400_MSG_FLAG_IS_RIGHT_CHANNEL 0x08000000
640 #define FF400_MSG_FLAG_IS_STEREO_PAIRED 0x02000000
641 #define FF400_MSG_MASK_STEREO_PAIR 0xf0000000
642 #define FF400_MSG_MASK_SIGNAL_LEVEL 0x00fffc00
643 #define FF400_MSG_FLAG_IS_MIDI_PORT_0 0x00000100
644 #define FF400_MSG_MASK_MIDI_PORT_0 0x000000ff
645 #define FF400_MSG_FLAG_IS_MIDI_PORT_1 0x01000000
646 #define FF400_MSG_MASK_MIDI_PORT_1 0x00ff0000
648 static void ff400_handle_msg(struct snd_ff *ff, unsigned int offset, const __le32 *buf,
649 size_t length, u32 tstamp)
651 bool need_hwdep_wake_up = false;
654 for (i = 0; i < length / 4; i++) {
655 u32 quad = le32_to_cpu(buf[i]);
657 if (quad & FF400_MSG_FLAG_IS_SIGNAL_LEVEL) {
658 struct ff400_msg_parser *parser = ff->msg_parser;
660 parser->msgs[parser->push_pos].msg = quad;
661 parser->msgs[parser->push_pos].tstamp = tstamp;
663 if (parser->push_pos >= FF400_QUEUE_SIZE)
664 parser->push_pos = 0;
666 need_hwdep_wake_up = true;
667 } else if (quad & FF400_MSG_FLAG_IS_MIDI_PORT_0) {
668 parse_midi_msg(ff, quad, 0);
669 } else if (quad & FF400_MSG_FLAG_IS_MIDI_PORT_1) {
670 parse_midi_msg(ff, quad, 1);
674 if (need_hwdep_wake_up)
675 wake_up(&ff->hwdep_wait);
678 static long ff400_copy_msg_to_user(struct snd_ff *ff, char __user *buf, long count)
680 struct ff400_msg_parser *parser = ff->msg_parser;
681 u32 type = SNDRV_FIREWIRE_EVENT_FF400_MESSAGE;
687 spin_unlock_irq(&ff->lock);
689 if (copy_to_user(buf, &type, sizeof(type)))
692 spin_lock_irq(&ff->lock);
694 count -= sizeof(type);
695 consumed += sizeof(type);
697 while (count >= sizeof(*parser->msgs) && parser->pull_pos != parser->push_pos) {
698 spin_unlock_irq(&ff->lock);
700 if (copy_to_user(buf + consumed, parser->msgs + parser->pull_pos,
701 sizeof(*parser->msgs)))
704 spin_lock_irq(&ff->lock);
706 if (parser->pull_pos >= FF400_QUEUE_SIZE)
707 parser->pull_pos = 0;
708 count -= sizeof(*parser->msgs);
709 consumed += sizeof(*parser->msgs);
715 const struct snd_ff_protocol snd_ff_protocol_ff400 = {
716 .msg_parser_size = sizeof(struct ff400_msg_parser),
717 .has_msg = ff400_has_msg,
718 .copy_msg_to_user = ff400_copy_msg_to_user,
719 .handle_msg = ff400_handle_msg,
720 .fill_midi_msg = former_fill_midi_msg,
721 .get_clock = former_get_clock,
722 .switch_fetching_mode = former_switch_fetching_mode,
723 .allocate_resources = ff400_allocate_resources,
724 .begin_session = ff400_begin_session,
725 .finish_session = ff400_finish_session,
726 .dump_status = former_dump_status,