Merge tag 'drm-next-2024-03-22' of https://gitlab.freedesktop.org/drm/kernel

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / sdma_v4_4_2.c

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index eaa4f5f499491e0acd8253c3f5e536ffd7e5a708..34237a1b1f2e45c40989c2070bdc0ae071ee0c4b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -431,16 +431,11 @@ static void sdma_v4_4_2_inst_gfx_stop(struct amdgpu_device *adev,
        struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES];
        u32 doorbell_offset, doorbell;
        u32 rb_cntl, ib_cntl;
-       int i, unset = 0;
+       int i;
 
        for_each_inst(i, inst_mask) {
                sdma[i] = &adev->sdma.instance[i].ring;
 
-               if ((adev->mman.buffer_funcs_ring == sdma[i]) && unset != 1) {
-                       amdgpu_ttm_set_buffer_funcs_status(adev, false);
-                       unset = 1;
-               }
-
                rb_cntl = RREG32_SDMA(i, regSDMA_GFX_RB_CNTL);
                rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_GFX_RB_CNTL, RB_ENABLE, 0);
                WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl);
@@ -487,20 +482,10 @@ static void sdma_v4_4_2_inst_rlc_stop(struct amdgpu_device *adev,
 static void sdma_v4_4_2_inst_page_stop(struct amdgpu_device *adev,
                                       uint32_t inst_mask)
 {
-       struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES];
        u32 rb_cntl, ib_cntl;
        int i;
-       bool unset = false;
 
        for_each_inst(i, inst_mask) {
-               sdma[i] = &adev->sdma.instance[i].page;
-
-               if ((adev->mman.buffer_funcs_ring == sdma[i]) &&
-                       (!unset)) {
-                       amdgpu_ttm_set_buffer_funcs_status(adev, false);
-                       unset = true;
-               }
-
                rb_cntl = RREG32_SDMA(i, regSDMA_PAGE_RB_CNTL);
                rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_PAGE_RB_CNTL,
                                        RB_ENABLE, 0);
@@ -612,7 +597,7 @@ static uint32_t sdma_v4_4_2_rb_cntl(struct amdgpu_ring *ring, uint32_t rb_cntl)
        /* Set ring buffer size in dwords */
        uint32_t rb_bufsz = order_base_2(ring->ring_size / 4);
 
-       barrier(); /* work around https://bugs.llvm.org/show_bug.cgi?id=42576 */
+       barrier(); /* work around https://llvm.org/pr42576 */
        rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_GFX_RB_CNTL, RB_SIZE, rb_bufsz);
 #ifdef __BIG_ENDIAN
        rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_GFX_RB_CNTL, RB_SWAP_ENABLE, 1);
@@ -950,13 +935,7 @@ static int sdma_v4_4_2_inst_start(struct amdgpu_device *adev,
                        r = amdgpu_ring_test_helper(page);
                        if (r)
                                return r;
-
-                       if (adev->mman.buffer_funcs_ring == page)
-                               amdgpu_ttm_set_buffer_funcs_status(adev, true);
                }
-
-               if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
        }
 
        return r;