arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs
authorArd Biesheuvel <ardb@kernel.org>
Wed, 14 Feb 2024 12:29:26 +0000 (13:29 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 16 Feb 2024 12:42:42 +0000 (12:42 +0000)
Update Kconfig to permit 4k and 16k granule configurations to be built
with 52-bit virtual addressing, now that all the prerequisites are in
place.

While at it, update the feature description so it matches on the
appropriate feature bits depending on the page size. For simplicity,
let's just keep ARM64_HAS_VA52 as the feature name.

Note that LPA2 based 52-bit virtual addressing requires 52-bit physical
addressing support to be enabled as well, as programming TCR.TxSZ to
values below 16 is not allowed unless TCR.DS is set, which is what
activates the 52-bit physical addressing support.

While supporting the converse (52-bit physical addressing without 52-bit
virtual addressing) would be possible in principle, let's keep things
simple, by only allowing these features to be enabled at the same time.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20240214122845.2033971-85-ardb+git@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/Kconfig
arch/arm64/kernel/cpufeature.c

index 9ca3316d637969d6ee18a2508bed8905a15fd88a..eed8fef08a1066aa60de79c8e87ecda74e4098a0 100644 (file)
@@ -368,7 +368,9 @@ config PGTABLE_LEVELS
        default 3 if ARM64_64K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52)
        default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
        default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
+       default 4 if ARM64_16K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52)
        default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
+       default 5 if ARM64_4K_PAGES && ARM64_VA_BITS_52
 
 config ARCH_SUPPORTS_UPROBES
        def_bool y
@@ -396,13 +398,13 @@ config BUILTIN_RETURN_ADDRESS_STRIPS_PAC
 config KASAN_SHADOW_OFFSET
        hex
        depends on KASAN_GENERIC || KASAN_SW_TAGS
-       default 0xdfff800000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && !KASAN_SW_TAGS
-       default 0xdfffc00000000000 if ARM64_VA_BITS_47 && !KASAN_SW_TAGS
+       default 0xdfff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && !KASAN_SW_TAGS
+       default 0xdfffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && !KASAN_SW_TAGS
        default 0xdffffe0000000000 if ARM64_VA_BITS_42 && !KASAN_SW_TAGS
        default 0xdfffffc000000000 if ARM64_VA_BITS_39 && !KASAN_SW_TAGS
        default 0xdffffff800000000 if ARM64_VA_BITS_36 && !KASAN_SW_TAGS
-       default 0xefff800000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && KASAN_SW_TAGS
-       default 0xefffc00000000000 if ARM64_VA_BITS_47 && KASAN_SW_TAGS
+       default 0xefff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && KASAN_SW_TAGS
+       default 0xefffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && KASAN_SW_TAGS
        default 0xeffffe0000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS
        default 0xefffffc000000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS
        default 0xeffffff800000000 if ARM64_VA_BITS_36 && KASAN_SW_TAGS
@@ -1310,7 +1312,7 @@ config ARM64_VA_BITS_48
 
 config ARM64_VA_BITS_52
        bool "52-bit"
-       depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN)
+       depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
        help
          Enable 52-bit virtual addressing for userspace when explicitly
          requested via a hint to mmap(). The kernel will also use 52-bit
@@ -1357,10 +1359,11 @@ choice
 
 config ARM64_PA_BITS_48
        bool "48-bit"
+       depends on ARM64_64K_PAGES || !ARM64_VA_BITS_52
 
 config ARM64_PA_BITS_52
-       bool "52-bit (ARMv8.2)"
-       depends on ARM64_64K_PAGES
+       bool "52-bit"
+       depends on ARM64_64K_PAGES || ARM64_VA_BITS_52
        depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
        help
          Enable support for a 52-bit physical address space, introduced as
index 94f035f6c421653ef26ab5ff2a5bf71f9e71b82c..0be9296e9253b536d38e45acf4ee89a5d294f1a3 100644 (file)
@@ -2703,15 +2703,29 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
        },
 #ifdef CONFIG_ARM64_VA_BITS_52
        {
-               .desc = "52-bit Virtual Addressing (LVA)",
                .capability = ARM64_HAS_VA52,
                .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
-               .sys_reg = SYS_ID_AA64MMFR2_EL1,
-               .sign = FTR_UNSIGNED,
+               .matches = has_cpuid_feature,
                .field_width = 4,
+#ifdef CONFIG_ARM64_64K_PAGES
+               .desc = "52-bit Virtual Addressing (LVA)",
+               .sign = FTR_SIGNED,
+               .sys_reg = SYS_ID_AA64MMFR2_EL1,
                .field_pos = ID_AA64MMFR2_EL1_VARange_SHIFT,
-               .matches = has_cpuid_feature,
                .min_field_value = ID_AA64MMFR2_EL1_VARange_52,
+#else
+               .desc = "52-bit Virtual Addressing (LPA2)",
+               .sys_reg = SYS_ID_AA64MMFR0_EL1,
+#ifdef CONFIG_ARM64_4K_PAGES
+               .sign = FTR_SIGNED,
+               .field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT,
+               .min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT,
+#else
+               .sign = FTR_UNSIGNED,
+               .field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT,
+               .min_field_value = ID_AA64MMFR0_EL1_TGRAN16_52_BIT,
+#endif
+#endif
        },
 #endif
        {},