x86: adjust enable_NMI_through_LVT0()
authorJan Beulich <jbeulich@novell.com>
Tue, 11 Mar 2008 10:30:25 +0000 (11:30 +0100)
committerChris Wright <chrisw@sous-sol.org>
Mon, 24 Mar 2008 18:47:11 +0000 (11:47 -0700)
commit e94271017f0933b29362a3c9dea5a6b9d04d98e1

Its previous use in a call to on_each_cpu() was pointless, as at the
time that code gets executed only one CPU is online. Further, the
function can be __cpuinit, and for this to work without
CONFIG_HOTPLUG_CPU setup_nmi() must also get an attribute (this one
can even be __init; on 64-bits check_timer() also was lacking that
attribute).

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
[ tglx@linutronix.de: backport to 2.6.24.3]
Cc: Justin Piszcz <jpiszcz@lucidpixels.com>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/x86/kernel/apic_32.c
arch/x86/kernel/apic_64.c
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/io_apic_64.c
arch/x86/kernel/smpboot_32.c
arch/x86/kernel/smpboot_64.c
include/asm-x86/apic_32.h
include/asm-x86/io_apic_64.h

index edb5108e5d0e057f24dabe50ae1fde323b9fed56..c48fbb1919ee8b026f6a6f1a07793a7e79586bab 100644 (file)
@@ -154,7 +154,7 @@ unsigned long safe_apic_wait_icr_idle(void)
 /**
  * enable_NMI_through_LVT0 - enable NMI through local vector table 0
  */
-void enable_NMI_through_LVT0 (void * dummy)
+void __cpuinit enable_NMI_through_LVT0(void)
 {
        unsigned int v = APIC_DM_NMI;
 
index f28ccb588fbab8996cd76512d2c1bae24e4b1a2c..0173007d777a3d0b8f803aca6be171d8e03172f0 100644 (file)
@@ -151,7 +151,7 @@ unsigned int safe_apic_wait_icr_idle(void)
        return send_status;
 }
 
-void enable_NMI_through_LVT0 (void * dummy)
+void enable_NMI_through_LVT0(void)
 {
        unsigned int v;
 
index a6b1490e00c4abac2953d106691bceec13954930..232fdebdccaa63f642bfeb68d93127481e3a85e3 100644 (file)
@@ -2080,7 +2080,7 @@ static struct irq_chip lapic_chip __read_mostly = {
        .eoi            = ack_apic,
 };
 
-static void setup_nmi (void)
+static void __init setup_nmi(void)
 {
        /*
         * Dirty trick to enable the NMI watchdog ...
@@ -2093,7 +2093,7 @@ static void setup_nmi (void)
         */ 
        apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ...");
 
-       on_each_cpu(enable_NMI_through_LVT0, NULL, 1, 1);
+       enable_NMI_through_LVT0();
 
        apic_printk(APIC_VERBOSE, " done.\n");
 }
index cbac1670c7c36ec4ee8c268618b4a8014859c2f3..7119cb70cc4dd74d05f88a09f60ad05a4b1d5f10 100644 (file)
@@ -1565,7 +1565,7 @@ static struct hw_interrupt_type lapic_irq_type __read_mostly = {
        .end = end_lapic_irq,
 };
 
-static void setup_nmi (void)
+static void __init setup_nmi(void)
 {
        /*
         * Dirty trick to enable the NMI watchdog ...
@@ -1578,7 +1578,7 @@ static void setup_nmi (void)
         */ 
        printk(KERN_INFO "activating NMI Watchdog ...");
 
-       enable_NMI_through_LVT0(NULL);
+       enable_NMI_through_LVT0();
 
        printk(" done.\n");
 }
@@ -1654,7 +1654,7 @@ static inline void unlock_ExtINT_logic(void)
  *
  * FIXME: really need to revamp this for modern platforms only.
  */
-static inline void check_timer(void)
+static inline void __init check_timer(void)
 {
        struct irq_cfg *cfg = irq_cfg + 0;
        int apic1, pin1, apic2, pin2;
index 4ea80cbe52e58916798a9e7bd962c90ebd4e5a3f..fe200cf09ee6a75f065de494dbde026ca19103aa 100644 (file)
@@ -405,7 +405,7 @@ static void __cpuinit start_secondary(void *unused)
        setup_secondary_clock();
        if (nmi_watchdog == NMI_IO_APIC) {
                disable_8259A_irq(0);
-               enable_NMI_through_LVT0(NULL);
+               enable_NMI_through_LVT0();
                enable_8259A_irq(0);
        }
        /*
index aaf4e1291217ef120d98cb3d7d98e55dd0debb79..eca8026511bb11828062128f83761da316154611 100644 (file)
@@ -338,7 +338,7 @@ void __cpuinit start_secondary(void)
 
        if (nmi_watchdog == NMI_IO_APIC) {
                disable_8259A_irq(0);
-               enable_NMI_through_LVT0(NULL);
+               enable_NMI_through_LVT0();
                enable_8259A_irq(0);
        }
 
index be158b27d54b38854f8c63d713daa83fbdaa3954..04fbe7fdabf0865089b1fc7606f5b3d2282f7dcb 100644 (file)
@@ -109,7 +109,7 @@ extern void setup_boot_APIC_clock (void);
 extern void setup_secondary_APIC_clock (void);
 extern int APIC_init_uniprocessor (void);
 
-extern void enable_NMI_through_LVT0 (void * dummy);
+extern void enable_NMI_through_LVT0(void);
 
 #define ARCH_APICTIMER_STOPS_ON_C3     1
 
index e2c13675ee4e8c84504e6a72a7cffaa8c9ae8b4b..1913ad0ae576ef6dad042a274eb5ae25d2fcea88 100644 (file)
@@ -129,7 +129,7 @@ extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
 
 extern int sis_apic_bug; /* dummy */ 
 
-void enable_NMI_through_LVT0 (void * dummy);
+void enable_NMI_through_LVT0(void);
 
 extern spinlock_t i8259A_lock;