net: hns3: change type of numa_node_mask as nodemask_t
authorPeiyang Wang <wangpeiyang1@huawei.com>
Tue, 7 May 2024 13:42:20 +0000 (21:42 +0800)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 9 May 2024 08:47:32 +0000 (10:47 +0200)
It provides nodemask_t to describe the numa node mask in kernel. To
improve transportability, change the type of numa_node_mask as nodemask_t.

Fixes: 38caee9d3ee8 ("net: hns3: Add support of the HNAE3 framework")
Signed-off-by: Peiyang Wang <wangpeiyang1@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/hisilicon/hns3/hnae3.h
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h

index f19f1e1d1f9f036005e59ea3ceea722b7d870fa0..133c94646c21db4f93220778ff42f31c0ecad301 100644 (file)
@@ -897,7 +897,7 @@ struct hnae3_handle {
                struct hnae3_roce_private_info rinfo;
        };
 
-       u32 numa_node_mask;     /* for multi-chip support */
+       nodemask_t numa_node_mask; /* for multi-chip support */
 
        enum hnae3_port_base_vlan_state port_base_vlan_state;
 
index 8043f1795dc7e37fe063fe8f339cf6b704d7a582..ecff9b42652741f3249e3911c7b0d0967c209290 100644 (file)
@@ -1769,7 +1769,8 @@ static int hclge_vport_setup(struct hclge_vport *vport, u16 num_tqps)
 
        nic->pdev = hdev->pdev;
        nic->ae_algo = &ae_algo;
-       nic->numa_node_mask = hdev->numa_node_mask;
+       bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
+                   MAX_NUMNODES);
        nic->kinfo.io_base = hdev->hw.hw.io_base;
 
        ret = hclge_knic_setup(vport, num_tqps,
@@ -2461,7 +2462,8 @@ static int hclge_init_roce_base_info(struct hclge_vport *vport)
 
        roce->pdev = nic->pdev;
        roce->ae_algo = nic->ae_algo;
-       roce->numa_node_mask = nic->numa_node_mask;
+       bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
+                   MAX_NUMNODES);
 
        return 0;
 }
index e3c69be8256f6a1781f1cf2edd724c77d3caa5b9..3a9186457ad89667c6e5edae725bc711ddb34abe 100644 (file)
@@ -894,7 +894,7 @@ struct hclge_dev {
 
        u16 fdir_pf_filter_count; /* Num of guaranteed filters for this PF */
        u16 num_alloc_vport;            /* Num vports this driver supports */
-       u32 numa_node_mask;
+       nodemask_t numa_node_mask;
        u16 rx_buf_len;
        u16 num_tx_desc;                /* desc num of per tx queue */
        u16 num_rx_desc;                /* desc num of per rx queue */
index 0aa9beefd1c7ee6c53d9f2623069bae00848e77f..b57111252d07106a739ebaff98874f75ef48637b 100644 (file)
@@ -412,7 +412,8 @@ static int hclgevf_set_handle_info(struct hclgevf_dev *hdev)
 
        nic->ae_algo = &ae_algovf;
        nic->pdev = hdev->pdev;
-       nic->numa_node_mask = hdev->numa_node_mask;
+       bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
+                   MAX_NUMNODES);
        nic->flags |= HNAE3_SUPPORT_VF;
        nic->kinfo.io_base = hdev->hw.hw.io_base;
 
@@ -2082,8 +2083,8 @@ static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev)
 
        roce->pdev = nic->pdev;
        roce->ae_algo = nic->ae_algo;
-       roce->numa_node_mask = nic->numa_node_mask;
-
+       bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
+                   MAX_NUMNODES);
        return 0;
 }
 
index a73f2bf3a56a6426704c64a20e74403c715ac09f..cccef32284616bd62885ca130e19dcbe5e5cfc8a 100644 (file)
@@ -236,7 +236,7 @@ struct hclgevf_dev {
        u16 rss_size_max;       /* HW defined max RSS task queue */
 
        u16 num_alloc_vport;    /* num vports this driver supports */
-       u32 numa_node_mask;
+       nodemask_t numa_node_mask;
        u16 rx_buf_len;
        u16 num_tx_desc;        /* desc num of per tx queue */
        u16 num_rx_desc;        /* desc num of per rx queue */