drm/amdgpu: enable gfx power gating for GC 10.3.7
authorPrike Liang <Prike.Liang@amd.com>
Tue, 1 Mar 2022 06:08:24 +0000 (14:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 2 Mar 2022 23:40:06 +0000 (18:40 -0500)
Enable gfx power gating for GC 10.3.7.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/nv.c

index fd7ded7799e2de2a61764d9164436119c97b20d4..e048635435a248b9a09c09f2e2ca68fb3831e443 100644 (file)
@@ -8348,6 +8348,7 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable)
                case IP_VERSION(10, 3, 1):
                case IP_VERSION(10, 3, 3):
                case IP_VERSION(10, 3, 6):
+               case IP_VERSION(10, 3, 7):
                        data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
                        WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
                        break;
@@ -8417,6 +8418,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
        case IP_VERSION(10, 3, 1):
        case IP_VERSION(10, 3, 3):
        case IP_VERSION(10, 3, 6):
+       case IP_VERSION(10, 3, 7):
                gfx_v10_cntl_pg(adev, enable);
                amdgpu_gfx_off_ctrl(adev, enable);
                break;
index 05487894120a2aa73c826c22807fdbe93c88260b..e19f14c3ef59f7cbefebed55a2ab50a9ea5815b1 100644 (file)
@@ -959,7 +959,8 @@ static int nv_common_early_init(void *handle)
                        AMD_CG_SUPPORT_JPEG_MGCG;
                adev->pg_flags = AMD_PG_SUPPORT_VCN |
                        AMD_PG_SUPPORT_VCN_DPG |
-                       AMD_PG_SUPPORT_JPEG;
+                       AMD_PG_SUPPORT_JPEG |
+                       AMD_PG_SUPPORT_GFX_PG;
                adev->external_rev_id = adev->rev_id + 0x01;
                break;
        default: