x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit
authorTony Luck <tony.luck@intel.com>
Mon, 31 Jan 2022 23:01:08 +0000 (15:01 -0800)
committerBorislav Petkov <bp@suse.de>
Tue, 1 Feb 2022 15:15:19 +0000 (16:15 +0100)
commit00a2f23eef7d1fa6c2dfdc613857b84fbf5e2b3b
treeab88738de6a22311e9bf260341b856e2845009bf
parent0dcab41d3487acadf64d0667398e032341bd9918
x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit

After nine generations of adding to model specific list of CPUs that
support PPIN (Protected Processor Inventory Number) Intel allocated
a CPUID bit to enumerate the MSRs.

CPUID(EAX=7, ECX=1).EBX bit 0 enumerates presence of MSR_PPIN_CTL and
MSR_PPIN. Add it to the "scattered" CPUID bits and add an entry to the
ppin_cpuids[] x86_match_cpu() array to catch Intel CPUs that implement
it.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20220131230111.2004669-3-tony.luck@intel.com
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/scattered.c