arm64: mm: Add support for folding PUDs at runtime
authorArd Biesheuvel <ardb@kernel.org>
Wed, 14 Feb 2024 12:29:22 +0000 (13:29 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 16 Feb 2024 12:42:41 +0000 (12:42 +0000)
commit0dd4f60a2c76938c2625f6c630c225699d97608b
treefce658dd0e32ba152364007bbbb32497c5f0afcd
parent0383808e4d99ac31892655ae9dc93597eb6f1412
arm64: mm: Add support for folding PUDs at runtime

In order to support LPA2 on 16k pages in a way that permits non-LPA2
systems to run the same kernel image, we have to be able to fall back to
at most 48 bits of virtual addressing.

Falling back to 48 bits would result in a level 0 with only 2 entries,
which is suboptimal in terms of TLB utilization. So instead, let's fall
back to 47 bits in that case. This means we need to be able to fold PUDs
dynamically, similar to how we fold P4Ds for 48 bit virtual addressing
on LPA2 with 4k pages.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20240214122845.2033971-81-ardb+git@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/pgalloc.h
arch/arm64/include/asm/pgtable.h
arch/arm64/include/asm/tlb.h
arch/arm64/kernel/cpufeature.c
arch/arm64/mm/mmu.c
arch/arm64/mm/pgd.c