x86/mm/numa: Use core domain size on AMD
authorThomas Gleixner <tglx@linutronix.de>
Tue, 13 Feb 2024 21:04:17 +0000 (22:04 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 15 Feb 2024 21:07:38 +0000 (22:07 +0100)
commitd805a6916037a716e858a0a91d844bad1ca8f48b
tree9429f2dab0254be609b8d5ff84608473abd66f2b
parent3279081dd0cb6bc13ffd5ee0e5cb11cfeae2c625
x86/mm/numa: Use core domain size on AMD

cpuinfo::topo::x86_coreid_bits is about to be phased out. Use the core
domain size from the topology information.

Add a comment why the early MPTABLE parsing is required and decrapify the
loop which sets the APIC ID to node map.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mhklinux@outlook.com>
Tested-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Wang Wendy <wendy.wang@intel.com>
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Link: https://lore.kernel.org/r/20240212153625.270320718@linutronix.de
arch/x86/include/asm/topology.h
arch/x86/mm/amdtopology.c