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x86/apic: Remove unused phys_pkg_id() callback
2024-02-15 Thomas Gleixnerx86/apic: Remove unused phys_pkg_id() callback
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Remove x86_coreid_bits
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Remove topology.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Make topology_amd_node_id() use the actual...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mm/numa: Use core domain size on AMD
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for HYGON
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for AMD
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/smpboot: Teach it about topo.amd_node_id
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide an AMD/HYGON specific topology parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/amd: Provide a separate accessor for Node ID
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for Intel
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide a sane leaf 0xb/0x1f parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Move __max_die_per_package to common.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for Centaur and Zhaoxin
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Add legacy topology parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide cpu_init/parse_topology()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide cpuid_read() et al.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-01-18 Thomas GleixnerMerge tag 'timers-v6.8-rc1' of http://git.linaro.org...
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2023-12-20 Thomas Gleixnertimers: Rework idle logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-18 Thomas Gleixnerx86/acpi: Handle bogus MADT APIC tables gracefully
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/alternatives: Disable interrupts and sync when...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/alternatives: Sync core before enabling interrupts
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/smpboot/64: Handle X2APIC BIOS inconsistency gracefully
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-07 Thomas Gleixnerx86/entry: Do not allow external 0x80 interrupts
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-07 Thomas Gleixnerx86/entry: Convert INT 0x80 emulation to IDTENTRY
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-11-11 Thomas Gleixnerhrtimers: Push pending hrtimers away from outgoing...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas Gleixnerx86/tsc: Defer marking TSC unstable to a worker
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas Gleixnerx86/i8259: Skip probing when ACPI/MADT advertises PCAT...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas GleixnerMerge tag 'timers-v6.7-rc1' of https://git.linaro.org...
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2023-10-24 Thomas Gleixnerx86/microcode: Prepare for minimal revision check
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Handle "offline" CPUs correctly
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/apic: Provide apic_force_nmi_on_cpu()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Protect against instrumentation
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Rendezvous and load in NMI
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Replace the all-in-one rendevous handler
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Provide new control functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Add per CPU control field
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Add per CPU result state
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Sanitize __wait_for_cpus()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Clarify the late load logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Handle "nosmt" correctly
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Clean up mc_cpu_down_prep()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Get rid of the schedule work indirection
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Mop up early loading leftovers
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Use cached microcode for AP load
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Cache builtin/initrd microcode early
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Cache builtin microcode too
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Use correct per CPU ucode_cpu_info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Remove pointless apply() invocation
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Rework intel_find_matching_signature()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Reuse intel_cpu_collect_info()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Rework intel_cpu_collect_info()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Unify microcode apply() functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Switch to kvmalloc()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Save the microcode only after...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/intel: Simplify early loading
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-19 Thomas Gleixnerx86/microcode/intel: Cleanup code further
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-19 Thomas Gleixnerx86/microcode/intel: Simplify and rename generic_load_microc...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-19 Thomas Gleixnerx86/microcode/intel: Simplify scan_microcode()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/microcode/32: Move early loading after paging enable
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/boot/32: Temporarily map initrd for microcode loading
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/microcode: Provide CONFIG_MICROCODE_INITRD32
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/boot/32: Restructure mk_early_pgtbl_32()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/boot/32: De-uglify the 2/3 level paging difference...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/boot: Use __pa_nodebug() in mk_early_pgtbl_32()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-18 Thomas Gleixnerx86/boot/32: Disable stackprotector and tracing for...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-17 Thomas GleixnerMerge branch 'linus' into smp/core
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2023-10-10 Thomas Gleixnerx86/cpu: Provide debug interface
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu/topology: Cure the abuse of cpuinfo for persisting...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for wakeup_secondary_cpu[_64]()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for [gs]et_apic_id()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for phys_pkg_id()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for cpu_present_to_apicid()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for check_apicid_used()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use u32 for APIC IDs in global data
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Use BAD_APICID consistently
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move cpu_l[l2]c_id into topology info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move logical package and die IDs into topology...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Remove pointless evaluation of x86_coreid_bits
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move cu_id into topology info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move cpu_core_id into topology info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerhwmon: (fam15h_power) Use topology_core_id()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerscsi: lpfc: Use topology_core_id()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move cpu_die_id into topology info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Move phys_proc_id into topology info
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/cpu: Encapsulate topology information in cpuinfo_x86
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnerx86/apic: Fake primary thread mask for XEN/PV
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-10 Thomas Gleixnercpu/SMT: Make SMT control more robust against enumeration...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-09 Thomas GleixnerMerge tag 'irqchip-fixes-6.6-2' of git://git.kernel...
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2023-09-28 Thomas GleixnerMerge tag 'irqchip-fixes-6.6-1' of git://git.kernel...
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2023-09-20 Thomas Gleixnerlocking/rtmutex: Add a lockdep assert to catch potential...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-09-20 Thomas Gleixnersched: Extract __schedule_loop()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Allow drivers to mark unsafe regions...
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Add emit function and callback function...
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Add sequence handling
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Add ownership state functions
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Add buffer management
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: nbcon: Add acquire/release logic
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerprintk: Add non-BKL (nbcon) console basic infrastructure
Signed-off-by: Thomas Gleixner (Intel) <tglx@linutronix.de>
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2023-09-18 Thomas Gleixnerserial: xilinx_uartps: Use port lock wrappers
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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