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x86/cpu/topology: Get rid of cpuinfo::x86_max_cores
2024-02-16 Thomas Gleixnerx86/cpu/topology: Get rid of cpuinfo::x86_max_cores
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Provide __num_[cores|threads]_per_package
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Rename topology_max_die_per_package()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Rename smp_num_siblings
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Retrieve cores per package from topology...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Use topology logical mapping mechanism
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Provide logical pkg/die mapping
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Simplify cpu_mark_primary_thread()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Mop up primary thread mask handling
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Use topology bitmaps for sizing
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Let XEN/PV use topology from CPUID...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/xen/smp_pv: Count number of vCPUs early
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Assign hotpluggable CPUIDs during...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/topology: Add a mechanism to track topology via...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Detect real BSP on crash kernels
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Rework possible CPU management
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Sanitize the APIC admission logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/smpboot: Make error message actually useful
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Use a data structure for topology...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Simplify APIC registration
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Confine topology information
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/xen/smp_pv: Register fake APICs
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/acpi: Dont invoke topology_register_apic() for...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Use new APIC registration function
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/of: Use new APIC registration functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/jailhouse: Use new APIC registration function
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/acpi: Use new APIC registration functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Provide separate APIC registration...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Move registration out of APIC code
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Use a proper define for invalid ACPI CPU ID
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Remove yet another dubious callback
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Remove the pointless writeback of boot_cpu_physica...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Remove the physid_t bitmap wrapper
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mm/numa: Move early mptable evaluation into common...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Switch to new init callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/hyperv/vtl: Prepare for separate mpparse callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/xen/smp_pv: Prepare for separate mpparse callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/jailhouse: Prepare for separate mpparse callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/platform/intel-mid: Prepare for separate mpparse...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/platform/ce4100: Prepare for separate mpparse callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/dtb: Rename x86_dtb_init()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Prepare for callback separation
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Provide separate early/late callbacks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mpparse: Rename default_find_smp_config()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Remove check_apicid_used() and ioapic_phys_id_map()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/ioapic: Simplify setup_ioapic_ids_from_mpc_nocheck()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/ioapic: Make io_apic_get_unique_id() simpler
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Get rid of get_physical_broadcast()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/ioapic: Replace some more set bit nonsense
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/platform/ce4100: Dont override x86_init.mpparse...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/topology: Make the APIC mismatch warnings complete
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic/uv: Remove the private leaf 0xb parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/xen/smp_pv: Remove cpudata fiddling
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/apic: Remove unused phys_pkg_id() callback
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Remove x86_coreid_bits
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Remove topology.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Make topology_amd_node_id() use the actual...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/mm/numa: Use core domain size on AMD
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for HYGON
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for AMD
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/smpboot: Teach it about topo.amd_node_id
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide an AMD/HYGON specific topology parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu/amd: Provide a separate accessor for Node ID
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for Intel
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide a sane leaf 0xb/0x1f parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Move __max_die_per_package to common.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Use common topology code for Centaur and Zhaoxin
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Add legacy topology parser
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide cpu_init/parse_topology()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-02-15 Thomas Gleixnerx86/cpu: Provide cpuid_read() et al.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2024-01-18 Thomas GleixnerMerge tag 'timers-v6.8-rc1' of http://git.linaro.org...
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2023-12-20 Thomas Gleixnertimers: Rework idle logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-18 Thomas Gleixnerx86/acpi: Handle bogus MADT APIC tables gracefully
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/alternatives: Disable interrupts and sync when...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/alternatives: Sync core before enabling interrupts
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-15 Thomas Gleixnerx86/smpboot/64: Handle X2APIC BIOS inconsistency gracefully
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-07 Thomas Gleixnerx86/entry: Do not allow external 0x80 interrupts
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-12-07 Thomas Gleixnerx86/entry: Convert INT 0x80 emulation to IDTENTRY
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-11-11 Thomas Gleixnerhrtimers: Push pending hrtimers away from outgoing...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas Gleixnerx86/tsc: Defer marking TSC unstable to a worker
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas Gleixnerx86/i8259: Skip probing when ACPI/MADT advertises PCAT...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-27 Thomas GleixnerMerge tag 'timers-v6.7-rc1' of https://git.linaro.org...
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2023-10-24 Thomas Gleixnerx86/microcode: Prepare for minimal revision check
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Handle "offline" CPUs correctly
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/apic: Provide apic_force_nmi_on_cpu()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Protect against instrumentation
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Rendezvous and load in NMI
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Replace the all-in-one rendevous handler
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Provide new control functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Add per CPU control field
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Add per CPU result state
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Sanitize __wait_for_cpus()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Clarify the late load logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Handle "nosmt" correctly
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Clean up mc_cpu_down_prep()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Get rid of the schedule work indirection
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode: Mop up early loading leftovers
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Use cached microcode for AP load
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2023-10-24 Thomas Gleixnerx86/microcode/amd: Cache builtin/initrd microcode early
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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