Use last-level cache for simulation. Even if there are more than

3 cache levels. Update documentation.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13030 a5019735-40e9-0310-863c-91ae7b9d1cf9

diff --git a/cachegrind/cg-arch.c b/cachegrind/cg-arch.c
index c6847d99e98da79665c838da5336874aac1d5fe4..93af0d0611843b57ee62d0ef896048b4b80fb5e5 100644 (file)
--- a/cachegrind/cg-arch.c
+++ b/cachegrind/cg-arch.c
@@ -302,8 +302,6 @@ configure_caches(cache_t *I1c, cache_t *D1c, cache_t *LLc,
    // Extract what we need
    i1 = locate_cache(ci, INSN_CACHE, 1);
    d1 = locate_cache(ci, DATA_CACHE, 1);
-   // FIXME: needs clarification for num_levels > 3 see also warning below
-   // FIXME: whether it needs adjustment
    ll = locate_cache(ci, UNIFIED_CACHE, ci->num_levels);
 
    if (ll && ci->num_levels > 2) {

diff --git a/cachegrind/docs/cg-manual.xml b/cachegrind/docs/cg-manual.xml
index 7f4d8bc1307b9eea55debb7f95053b9d209b6d20..fb6f9786b52d996335454990dadb03be277fde09 100644 (file)
--- a/cachegrind/docs/cg-manual.xml
+++ b/cachegrind/docs/cg-manual.xml
@@ -20,10 +20,10 @@ independent first-level instruction and data caches (I1 and D1), backed by a
 unified second-level cache (L2).  This exactly matches the configuration of
 many modern machines.</para>
 
-<para>However, some modern machines have three levels of cache.  For these
+<para>However, some modern machines have three or four levels of cache.  For these
 machines (in the cases where Cachegrind can auto-detect the cache
-configuration) Cachegrind simulates the first-level and third-level caches.
-The reason for this choice is that the L3 cache has the most influence on
+configuration) Cachegrind simulates the first-level and last-level caches.
+The reason for this choice is that the last-level cache has the most influence on
 runtime, as it masks accesses to main memory.  Furthermore, the L1 caches
 often have low associativity, so simulating them can detect cases where the
 code interacts badly with this cache (eg. traversing a matrix column-wise