x86/cpu: Add new Alderlake and Raptorlake CPU model numbers
authorTony Luck <tony.luck@intel.com>
Mon, 11 Apr 2022 23:37:03 +0000 (16:37 -0700)
committerBorislav Petkov <bp@suse.de>
Tue, 19 Apr 2022 10:04:51 +0000 (12:04 +0200)
Intel is subdividing the mobile segment with additional models
with the same codename. Using the Intel "N" and "P" suffices
for these will be less confusing than trying to map to some
different naming convention.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/YlS7n7Xtso9BXZA2@agluck-desk3.sc.intel.com
arch/x86/include/asm/intel-family.h

index 048b6d5aff504f394baeca8d3bf1f39e816bfdd5..def6ca121111ce2873749ea418c43169caadb412 100644 (file)
@@ -26,6 +26,7 @@
  *             _G      - parts with extra graphics on
  *             _X      - regular server parts
  *             _D      - micro server parts
+ *             _N,_P   - other mobile parts
  *
  *             Historical OPTDIFFs:
  *
 
 #define INTEL_FAM6_ALDERLAKE           0x97    /* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L         0x9A    /* Golden Cove / Gracemont */
+#define INTEL_FAM6_ALDERLAKE_N         0xBE
 
 #define INTEL_FAM6_RAPTORLAKE          0xB7
+#define INTEL_FAM6_RAPTORLAKE_P                0xBA
 
 /* "Small Core" Processors (Atom) */