RDMA/rxe: Implement RC RDMA FLUSH service in requester side
authorLi Zhijian <lizhijian@fujitsu.com>
Tue, 6 Dec 2022 13:01:57 +0000 (21:01 +0800)
committerJason Gunthorpe <jgg@nvidia.com>
Fri, 9 Dec 2022 23:36:02 +0000 (19:36 -0400)
Implement FLUSH request operation in the requester.

Link: https://lore.kernel.org/r/20221206130201.30986-7-lizhijian@fujitsu.com
Reviewed-by: Zhu Yanjun <zyjzyj2000@gmail.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/sw/rxe/rxe_req.c

index 2713e905892253ac297efd43f4636ee5313444dc..899c8779f8001cd21bb16f8726e8b61cc611d50b 100644 (file)
@@ -241,6 +241,9 @@ static int next_opcode_rc(struct rxe_qp *qp, u32 opcode, int fits)
                                IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE :
                                IB_OPCODE_RC_SEND_FIRST;
 
+       case IB_WR_FLUSH:
+               return IB_OPCODE_RC_FLUSH;
+
        case IB_WR_RDMA_READ:
                return IB_OPCODE_RC_RDMA_READ_REQUEST;
 
@@ -425,11 +428,18 @@ static struct sk_buff *init_req_packet(struct rxe_qp *qp,
 
        /* init optional headers */
        if (pkt->mask & RXE_RETH_MASK) {
-               reth_set_rkey(pkt, ibwr->wr.rdma.rkey);
+               if (pkt->mask & RXE_FETH_MASK)
+                       reth_set_rkey(pkt, ibwr->wr.flush.rkey);
+               else
+                       reth_set_rkey(pkt, ibwr->wr.rdma.rkey);
                reth_set_va(pkt, wqe->iova);
                reth_set_len(pkt, wqe->dma.resid);
        }
 
+       /* Fill Flush Extension Transport Header */
+       if (pkt->mask & RXE_FETH_MASK)
+               feth_init(pkt, ibwr->wr.flush.type, ibwr->wr.flush.level);
+
        if (pkt->mask & RXE_IMMDT_MASK)
                immdt_set_imm(pkt, ibwr->ex.imm_data);
 
@@ -488,6 +498,9 @@ static int finish_packet(struct rxe_qp *qp, struct rxe_av *av,
 
                        memset(pad, 0, bth_pad(pkt));
                }
+       } else if (pkt->mask & RXE_FLUSH_MASK) {
+               /* oA19-2: shall have no payload. */
+               wqe->dma.resid = 0;
        }
 
        if (pkt->mask & RXE_ATOMIC_WRITE_MASK) {